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SubjectRe: [PATCH 2/2] clk: mediatek: mt8195: Add reset idx for PCIe0 and PCIe1
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Quoting AngeloGioacchino Del Regno (2022-06-29 03:52:05)
> Add the reset idx for PCIe P0, P1, located in infra_ao RST2 registers.
>
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
> ---

Applied to clk-next

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