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SubjectRe: [PATCH v12 05/10] drm/mediatek: Add MT8195 Embedded DisplayPort driver
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Hi, Bo-Chen:

On Mon, 2022-06-27 at 16:03 +0800, Bo-Chen Chen wrote:
> From: Markus Schneider-Pargmann <msp@baylibre.com>
>
> This patch adds a embedded displayport driver for the MediaTek mt8195
> SoC.
>
> It supports the MT8195, the embedded DisplayPort units. It offers
> DisplayPort 1.4 with up to 4 lanes.
>
> The driver creates a child device for the phy. The child device will
> never exist without the parent being active. As they are sharing a
> register range, the parent passes a regmap pointer to the child so
> that
> both can work with the same register range. The phy driver sets
> device
> data that is read by the parent to get the phy device that can be
> used
> to control the phy properties.
>
> This driver is based on an initial version by
> Jitao shi <jitao.shi@mediatek.com>
>
> Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com>
> Signed-off-by: Guillaume Ranquet <granquet@baylibre.com>
> [Bo-Chen: Cleanup the drivers and modify comments from reviewers]
> Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
> ---

[snip]

> +
> +static irqreturn_t mtk_dp_hpd_event_thread(int hpd, void *dev)
> +{
> + struct mtk_dp *mtk_dp = dev;
> + u8 buf[DP_RECEIVER_CAP_SIZE] = {};
> +
> + if (mtk_dp->train_info.cable_state_change) {
> + mtk_dp->train_info.cable_state_change = false;
> +
> + mtk_dp_update_bits(mtk_dp, MTK_DP_TOP_PWR_STATE,
> + DP_PWR_STATE_BANDGAP_TPLL_LANE,
> + DP_PWR_STATE_MASK);
> + drm_dp_read_dpcd_caps(&mtk_dp->aux, buf);
> + mtk_dp->train_info.link_rate =
> + min_t(int, mtk_dp->max_linkrate,
> + buf[mtk_dp->max_linkrate]);
> + mtk_dp->train_info.lane_count =
> + min_t(int, mtk_dp->max_lanes,
> + drm_dp_max_lane_count(buf));

If the state_change is unplug, why do you modify link_rate and
lane_count?
If the state_change is plug, there is a training flow to decide
link_rate and lane_count. I think the training flow is correct and any
modification here is redundant.

Regards,
CK

> + }
> +
> + if (mtk_dp->train_info.irq_sta.hpd_inerrupt) {
> + dev_dbg(mtk_dp->dev, "MTK_DP_HPD_INTERRUPT\n");
> + mtk_dp->train_info.irq_sta.hpd_inerrupt = false;
> + mtk_dp_hpd_sink_event(mtk_dp);
> + }
> +
> + return IRQ_HANDLED;
> +}
> +

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