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Subject[PATCH v1 0/4] imx8mm display controller power sequence
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This patch queue addresses the power sequence of the display controller
of the imx8mm SoC. The sequence mentioned in example code 5 in section
5.2.9.5 of reference manual imx-8MMini-yhsc.pdf was not being performed.
This meant that the display controller was not coming up.

Viraj Shah (4):
soc: imx: gpcv2: Power sequence for DISP
soc: imx: imx8m-blk-ctrl: Display Power ON sequence
soc: imx: imx8m-blk-ctrl: Add reset bits for mipi dsi phy
arm64: dts: imx8mm.dtsi: Add resets for dispmix power domain.

arch/arm64/boot/dts/freescale/imx8mm.dtsi | 1 +
drivers/soc/imx/gpcv2.c | 36 +++++++++++++++++++----
drivers/soc/imx/imx8m-blk-ctrl.c | 9 ++++--
3 files changed, 38 insertions(+), 8 deletions(-)

--
2.20.1

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