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    SubjectRe: [PATCH v3 1/5] dt-bindings: interrupt-controller: Add Renesas RZ/G2L Interrupt Controller
    Hi Geert,

    Thank you for the review.

    On Thu, May 12, 2022 at 7:43 AM Geert Uytterhoeven <geert@linux-m68k.org> wrote:
    >
    > Hi Prabhakar,
    >
    > On Wed, May 11, 2022 at 8:32 PM Lad Prabhakar
    > <prabhakar.mahadev-lad.rj@bp.renesas.com> wrote:
    > > Add DT bindings for the Renesas RZ/G2L Interrupt Controller.
    > >
    > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
    >
    > Thanks for the update!
    >
    > > --- /dev/null
    > > +++ b/Documentation/devicetree/bindings/interrupt-controller/renesas,rzg2l-irqc.yaml
    > > @@ -0,0 +1,134 @@
    > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
    > > +%YAML 1.2
    > > +---
    > > +$id: http://devicetree.org/schemas/interrupt-controller/renesas,rzg2l-irqc.yaml#
    > > +$schema: http://devicetree.org/meta-schemas/core.yaml#
    > > +
    > > +title: Renesas RZ/G2L (and alike SoC's) Interrupt Controller (IA55)
    > > +
    > > +maintainers:
    > > + - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
    > > + - Geert Uytterhoeven <geert+renesas@glider.be>
    > > +
    > > +description: |
    > > + IA55 performs various interrupt controls including synchronization for the external
    > > + interrupts of NMI, IRQ, and GPIOINT and the interrupts of the built-in peripheral
    > > + interrupts output by each IP. And it notifies the interrupt to the GIC
    > > + - IRQ sense select for 8 external interrupts, mapped to 8 GIC SPI interrupts
    > > + - GPIO pins used as external interrupt input pins, mapped to 32 GIC SPI interrupts
    > > + - NMI edge select (NMI is not treated as NMI exception and supports fall edge and
    > > + stand-up edge detection interrupts)
    > > +
    > > +allOf:
    > > + - $ref: /schemas/interrupt-controller.yaml#
    > > +
    > > +properties:
    > > + compatible:
    > > + items:
    > > + - enum:
    > > + - renesas,r9a07g044-irqc # RZ/G2L
    > > + - const: renesas,rzg2l-irqc
    > > +
    > > + '#interrupt-cells':
    > > + description: The first cell should contain interrupt number and the second cell
    > > + is used to specify the flag.
    >
    > The important part is still missing: which interrupt number (the general
    > description mentions 3 types)?
    > I believe the answer is "external interrupt number".
    >
    My bad will update to "The first cell should contain an external
    interrupt number (IRQ0-7) and the second cell is used to specify the
    flag."

    Cheers,
    Prabhakar

    > > + const: 2
    > > +
    > > +
    >
    > Double blank line.
    >
    > > + '#address-cells':
    > > + const: 0
    >
    > Gr{oetje,eeting}s,
    >
    > Geert
    >
    > --
    > Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
    >
    > In personal conversations with technical people, I call myself a hacker. But
    > when I'm talking to journalists I just say "programmer" or something like that.
    > -- Linus Torvalds

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