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Subject[PATCH v3 4/5] gpio: gpiolib: Add ngirq member to struct gpio_irq_chip
Date
Supported GPIO IRQs by the chip is not always equal to the number of GPIO
pins. For example on Renesas RZ/G2L SoC where it has GPIO0-122 pins but at
a give point a maximum of only 32 GPIO pins can be used as IRQ lines in
the IRQC domain.

This patch adds ngirq member to struct gpio_irq_chip and passes this as a
size to irq_domain_create_hierarchy()/irq_domain_create_simple() if it is
being set in the driver otherwise fallbacks to using ngpio.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
drivers/gpio/gpiolib.c | 4 ++--
include/linux/gpio/driver.h | 8 ++++++++
2 files changed, 10 insertions(+), 2 deletions(-)

diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c
index d36c4a965efc..a98877f939ea 100644
--- a/drivers/gpio/gpiolib.c
+++ b/drivers/gpio/gpiolib.c
@@ -1221,7 +1221,7 @@ static int gpiochip_hierarchy_add_domain(struct gpio_chip *gc)
gc->irq.domain = irq_domain_create_hierarchy(
gc->irq.parent_domain,
0,
- gc->ngpio,
+ gc->irq.ngirq ?: gc->ngpio,
gc->irq.fwnode,
&gc->irq.child_irq_domain_ops,
gc);
@@ -1574,7 +1574,7 @@ static int gpiochip_add_irqchip(struct gpio_chip *gc,
} else {
/* Some drivers provide custom irqdomain ops */
gc->irq.domain = irq_domain_create_simple(fwnode,
- gc->ngpio,
+ gc->irq.ngirq ?: gc->ngpio,
gc->irq.first,
gc->irq.domain_ops ?: &gpiochip_domain_ops,
gc);
diff --git a/include/linux/gpio/driver.h b/include/linux/gpio/driver.h
index 874aabd270c9..ed6df186907d 100644
--- a/include/linux/gpio/driver.h
+++ b/include/linux/gpio/driver.h
@@ -51,6 +51,14 @@ struct gpio_irq_chip {
*/
const struct irq_domain_ops *domain_ops;

+ /**
+ * @ngirq:
+ *
+ * The number of GPIO IRQ's handled by this IRQ domain; usually is
+ * equal to ngpio.
+ */
+ u16 ngirq;
+
#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
/**
* @fwnode:
--
2.25.1
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