[lkml]   [2022]   [Apr]   [23]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
Messages in this thread
SubjectRe: [PATCH 06/12] clk: sunxi=ng: add support for R329 CCUs
On 4/22/22 10:41 AM, wrote:
> From: Icenowy Zheng <>
> Allwinner R329 has two CCUs, one in CPUX and another in PRCM.
> Add support for them.
> Signed-off-by: Icenowy Zheng <>

There is a typo in your commit title. = should be -.

Thanks for updating the driver to use .fw_name and be loadable as a module. All
of those changes look good.

There are still some missing clocks here compared to the BSP, and a couple of
other minor issues. Please see my earlier review:

So far it's been consistent that any settable bits in the CCU registers actually
do something. So I would expect all of those bits to have an index reserved in
the binding, even if we do not model them. I want to avoid having to go back and
add gates to the binding out-of-order later, like we are doing for H6.


 \ /
  Last update: 2022-04-24 04:13    [W:0.201 / U:2.120 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site