Messages in this thread |  | | Date | Sat, 2 Apr 2022 14:29:59 +0200 | Subject | Re: [PATCH 1/5] dt-bindings: i2c: Add Qualcomm Geni based QUP i2c bindings | From | Krzysztof Kozlowski <> |
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On 02/04/2022 07:12, Kuldeep Singh wrote: > GENI(generic interface) based Qualcomm Universal Peripheral controller > can support multiple serial interfaces like spi,uart and i2c. > > Unlike other i2c controllers, QUP i2c bindings are present in parent > schema. Move it out from parent to an individual binding and let parent > refer to child schema later on. > > Please note, current schema isn't complete as it misses out few > properties and thus, add these missing properties along the process. > > Signed-off-by: Kuldeep Singh <singh.kuldeep87k@gmail.com> > --- > .../bindings/i2c/qcom,i2c-geni-qcom.yaml | 110 ++++++++++++++++++ > 1 file changed, 110 insertions(+) > create mode 100644 Documentation/devicetree/bindings/i2c/qcom,i2c-geni-qcom.yaml > > diff --git a/Documentation/devicetree/bindings/i2c/qcom,i2c-geni-qcom.yaml b/Documentation/devicetree/bindings/i2c/qcom,i2c-geni-qcom.yaml > new file mode 100644 > index 000000000000..01a02e680ea3 > --- /dev/null > +++ b/Documentation/devicetree/bindings/i2c/qcom,i2c-geni-qcom.yaml > @@ -0,0 +1,110 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: "http://devicetree.org/schemas/i2c/qcom,i2c-geni-qcom.yaml#" > +$schema: "http://devicetree.org/meta-schemas/core.yaml#" > + > +title: Qualcomm Geni based QUP I2C Controller > + > +maintainers: > + - Andy Gross <agross@kernel.org> > + - Bjorn Andersson <bjorn.andersson@linaro.org> > + > +allOf: > + - $ref: /schemas/i2c/i2c-controller.yaml# > + > +properties: > + compatible: > + enum: > + - qcom,geni-i2c
Just const, no enum. There are no other flavors of this (unless you think there are?).
> + > + clocks: > + maxItems: 1 > + > + clock-names: > + const: se > + > + clock-frequency: > + description: Desired I2C bus clock frequency in Hz > + default: 100000 > + > + interconnects: > + maxItems: 3 > + > + interconnect-names: > + items: > + - const: qup-core > + - const: qup-config > + - const: qup-memory > + > + interrupts: > + maxItems: 1 > + > + power-domains: > + maxItems: 1 > + > + reg: > + maxItems: 1 > + > + required-opps: > + maxItems: 1
I have doubts this is correct property. Usually it is part of the opp-table. I see sc7180 needs this, but I think it is a mistake. Do you know how it is supposed to work?
Best regards, Krzysztof
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