Messages in this thread |  | | Date | Sun, 17 Apr 2022 00:47:25 +0800 | From | Xu Yilun <> | Subject | Re: [PATCH v4 4/5] fpga: Use tab instead of space indentation |
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On Sat, Apr 16, 2022 at 07:07:18PM +0530, Nava kishore Manne wrote: > In FPGA Make file has both space and tab indentation to
Makefile indentation, to
> make them align use tab instead of space indentation. > > Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com>
With the minor fixes, please add my Acked-by
Acked-by: Xu Yilun <yilun.xu@intel.com>
> --- > Changes for v2: > -None. > Changes for v3: > -Updated commit description. > Changes for v4: > -None. > > drivers/fpga/Makefile | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/drivers/fpga/Makefile b/drivers/fpga/Makefile > index 0bff783d1b61..5935b3d0abd5 100644 > --- a/drivers/fpga/Makefile > +++ b/drivers/fpga/Makefile > @@ -18,9 +18,9 @@ obj-$(CONFIG_FPGA_MGR_TS73XX) += ts73xx-fpga.o > obj-$(CONFIG_FPGA_MGR_XILINX_SPI) += xilinx-spi.o > obj-$(CONFIG_FPGA_MGR_ZYNQ_FPGA) += zynq-fpga.o > obj-$(CONFIG_FPGA_MGR_ZYNQMP_FPGA) += zynqmp-fpga.o > -obj-$(CONFIG_FPGA_MGR_VERSAL_FPGA) += versal-fpga.o > -obj-$(CONFIG_ALTERA_PR_IP_CORE) += altera-pr-ip-core.o > -obj-$(CONFIG_ALTERA_PR_IP_CORE_PLAT) += altera-pr-ip-core-plat.o > +obj-$(CONFIG_FPGA_MGR_VERSAL_FPGA) += versal-fpga.o > +obj-$(CONFIG_ALTERA_PR_IP_CORE) += altera-pr-ip-core.o > +obj-$(CONFIG_ALTERA_PR_IP_CORE_PLAT) += altera-pr-ip-core-plat.o > > # FPGA Bridge Drivers > obj-$(CONFIG_FPGA_BRIDGE) += fpga-bridge.o > -- > 2.25.1
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