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    Subject[PATCH v7 02/13] riscv: integrate alternatives better into the main architecture
    Date
    Right now the alternatives need to be explicitly enabled and
    erratas are limited to SiFive ones.

    Over time with more SoCs and additional RiscV extensions, many more
    erratas or other patch-worthy features will emerge, so it doesn't
    really make sense to have the core alternatives able to get
    deactivated.

    So make it part of the core RiscV kernel and drop the main
    RISCV_ERRATA_ALTERNATIVES config symbol.

    This mimics how i.e. arm64 handles its alternatives implementation.

    Signed-off-by: Heiko Stuebner <heiko@sntech.de>
    ---
    arch/riscv/Kconfig.erratas | 10 ----------
    arch/riscv/Kconfig.socs | 1 -
    arch/riscv/Makefile | 2 +-
    arch/riscv/errata/Makefile | 1 -
    arch/riscv/include/asm/alternative-macros.h | 22 ---------------------
    arch/riscv/kernel/Makefile | 1 +
    arch/riscv/{errata => kernel}/alternative.c | 0
    arch/riscv/kernel/smpboot.c | 2 --
    arch/riscv/kernel/traps.c | 2 +-
    9 files changed, 3 insertions(+), 38 deletions(-)
    rename arch/riscv/{errata => kernel}/alternative.c (100%)

    diff --git a/arch/riscv/Kconfig.erratas b/arch/riscv/Kconfig.erratas
    index b44d6ecdb46e..d18be8ff0245 100644
    --- a/arch/riscv/Kconfig.erratas
    +++ b/arch/riscv/Kconfig.erratas
    @@ -1,17 +1,7 @@
    menu "CPU errata selection"

    -config RISCV_ERRATA_ALTERNATIVE
    - bool "RISC-V alternative scheme"
    - default y
    - help
    - This Kconfig allows the kernel to automatically patch the
    - errata required by the execution platform at run time. The
    - code patching is performed once in the boot stages. It means
    - that the overhead from this mechanism is just taken once.
    -
    config ERRATA_SIFIVE
    bool "SiFive errata"
    - depends on RISCV_ERRATA_ALTERNATIVE
    help
    All SiFive errata Kconfig depend on this Kconfig. Disabling
    this Kconfig will disable all SiFive errata. Please say "Y"
    diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
    index 6ec44a22278a..3df7f7ed0d81 100644
    --- a/arch/riscv/Kconfig.socs
    +++ b/arch/riscv/Kconfig.socs
    @@ -14,7 +14,6 @@ config SOC_SIFIVE
    select CLK_SIFIVE
    select CLK_SIFIVE_PRCI
    select SIFIVE_PLIC
    - select RISCV_ERRATA_ALTERNATIVE
    select ERRATA_SIFIVE
    help
    This enables support for SiFive SoC platform hardware.
    diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile
    index 7d81102cffd4..a7ed47ce9311 100644
    --- a/arch/riscv/Makefile
    +++ b/arch/riscv/Makefile
    @@ -103,7 +103,7 @@ endif

    head-y := arch/riscv/kernel/head.o

    -core-$(CONFIG_RISCV_ERRATA_ALTERNATIVE) += arch/riscv/errata/
    +core-y += arch/riscv/errata/
    core-$(CONFIG_KVM) += arch/riscv/kvm/

    libs-y += arch/riscv/lib/
    diff --git a/arch/riscv/errata/Makefile b/arch/riscv/errata/Makefile
    index b8f8740a3e44..0ca1c5281a2d 100644
    --- a/arch/riscv/errata/Makefile
    +++ b/arch/riscv/errata/Makefile
    @@ -1,2 +1 @@
    -obj-y += alternative.o
    obj-$(CONFIG_ERRATA_SIFIVE) += sifive/
    diff --git a/arch/riscv/include/asm/alternative-macros.h b/arch/riscv/include/asm/alternative-macros.h
    index 67406c376389..92da6b3920a3 100644
    --- a/arch/riscv/include/asm/alternative-macros.h
    +++ b/arch/riscv/include/asm/alternative-macros.h
    @@ -2,8 +2,6 @@
    #ifndef __ASM_ALTERNATIVE_MACROS_H
    #define __ASM_ALTERNATIVE_MACROS_H

    -#ifdef CONFIG_RISCV_ERRATA_ALTERNATIVE
    -
    #ifdef __ASSEMBLY__

    .macro ALT_ENTRY oldptr newptr vendor_id errata_id new_len
    @@ -76,26 +74,6 @@

    #endif /* __ASSEMBLY__ */

    -#else /* !CONFIG_RISCV_ERRATA_ALTERNATIVE*/
    -#ifdef __ASSEMBLY__
    -
    -.macro __ALTERNATIVE_CFG old_c
    - \old_c
    -.endm
    -
    -#define _ALTERNATIVE_CFG(old_c, new_c, vendor_id, errata_id, CONFIG_k) \
    - __ALTERNATIVE_CFG old_c
    -
    -#else /* !__ASSEMBLY__ */
    -
    -#define __ALTERNATIVE_CFG(old_c) \
    - old_c "\n"
    -
    -#define _ALTERNATIVE_CFG(old_c, new_c, vendor_id, errata_id, CONFIG_k) \
    - __ALTERNATIVE_CFG(old_c)
    -
    -#endif /* __ASSEMBLY__ */
    -#endif /* CONFIG_RISCV_ERRATA_ALTERNATIVE */
    /*
    * Usage:
    * ALTERNATIVE(old_content, new_content, vendor_id, errata_id, CONFIG_k)
    diff --git a/arch/riscv/kernel/Makefile b/arch/riscv/kernel/Makefile
    index ffc87e76b1dd..b02142517f7f 100644
    --- a/arch/riscv/kernel/Makefile
    +++ b/arch/riscv/kernel/Makefile
    @@ -18,6 +18,7 @@ extra-y += head.o
    extra-y += vmlinux.lds

    obj-y += soc.o
    +obj-y += alternative.o
    obj-y += cpu.o
    obj-y += cpufeature.o
    obj-y += entry.o
    diff --git a/arch/riscv/errata/alternative.c b/arch/riscv/kernel/alternative.c
    similarity index 100%
    rename from arch/riscv/errata/alternative.c
    rename to arch/riscv/kernel/alternative.c
    diff --git a/arch/riscv/kernel/smpboot.c b/arch/riscv/kernel/smpboot.c
    index 622f226454d5..a6d13dca1403 100644
    --- a/arch/riscv/kernel/smpboot.c
    +++ b/arch/riscv/kernel/smpboot.c
    @@ -41,9 +41,7 @@ static DECLARE_COMPLETION(cpu_running);
    void __init smp_prepare_boot_cpu(void)
    {
    init_cpu_topology();
    -#ifdef CONFIG_RISCV_ERRATA_ALTERNATIVE
    apply_boot_alternatives();
    -#endif
    }

    void __init smp_prepare_cpus(unsigned int max_cpus)
    diff --git a/arch/riscv/kernel/traps.c b/arch/riscv/kernel/traps.c
    index fe92e119e6a3..9984c8622c3b 100644
    --- a/arch/riscv/kernel/traps.c
    +++ b/arch/riscv/kernel/traps.c
    @@ -86,7 +86,7 @@ static void do_trap_error(struct pt_regs *regs, int signo, int code,
    }
    }

    -#if defined (CONFIG_XIP_KERNEL) && defined (CONFIG_RISCV_ERRATA_ALTERNATIVE)
    +#if defined (CONFIG_XIP_KERNEL)
    #define __trap_section __section(".xip.traps")
    #else
    #define __trap_section
    --
    2.30.2
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