lkml.org 
[lkml]   [2022]   [Mar]   [31]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
Date
SubjectRe: [PATCH v4 3/5] x86/PCI: Add $IRT PIRQ routing table support
From
On 3/31/22 10:11, Maciej W. Rozycki wrote:
> Handle the $IRT PCI IRQ Routing Table format used by AMI for its BCP
> (BIOS Configuration Program) external tool meant for tweaking BIOS
> structures without the need to rebuild it from sources[1].
>
> The $IRT format has been invented by AMI before Microsoft has come up
> with its $PIR format and a $IRT table is therefore there in some systems
> that lack a $PIR table, such as the DataExpert EXP8449 mainboard based
> on the ALi FinALi 486 chipset (M1489/M1487), which predates DMI 2.0 and
> cannot therefore be easily identified at run time.
>
> Unlike with the $PIR format there is no alignment guarantee as to the
> placement of the $IRT table, so scan the whole BIOS area bytewise.
>
> Credit to Michal Necasek for helping me chase documentation for the
> format.
>
> References:
>
> [1] "What is BCP? - AMI", <https://www.ami.com/what-is-bcp/>
>
> Signed-off-by: Maciej W. Rozycki <macro@orcam.me.uk>
> Cc: Michal Necasek <mnecasek@yahoo.com>
> ---
> Changes from v3:
>
> - Correct the BIOS memory scan such as to verify that the PCI IRQ Routing
> Table header as well as individual slot entries are all wholly contained
> within the BIOS memory area.
>
> - Following commit 5224f7909617 ("treewide: Replace zero-length arrays
> with flexible-array members") also make `slots' in `irt_routing_table' a
> flexible-array member.
>
> New change in v3.
> ---
> arch/x86/include/asm/pci_x86.h | 9 ++++
> arch/x86/pci/irq.c | 76 +++++++++++++++++++++++++++++++++++++++++
> 2 files changed, 85 insertions(+)

Tested-by: Dmitry Osipenko <dmitry.osipenko@collabora.com> # crosvm

\
 
 \ /
  Last update: 2022-03-31 22:58    [W:0.053 / U:2.516 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site