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SubjectRe: [PATCH V2 2/7] iio: adc: sc27xx: fix read big scale voltage not right
On Thu, 24 Mar 2022 15:36:56 +0800
Cixi Geng <gengcixi@gmail.com> wrote:

> Jonathan Cameron <jic23@kernel.org> 于2022年3月20日周日 21:25写道:
> >
> > On Sat, 12 Mar 2022 00:46:23 +0800
> > Cixi Geng <gengcixi@gmail.com> wrote:
> >
> > > From: Cixi Geng <cixi.geng1@unisoc.com>
> > >
> > > Fix wrong configuration value of SC27XX_ADC_SCALE_MASK and
> > > SC27XX_ADC_SCALE_SHIFT by spec documetation.
> > >
> > > Signed-off-by: Yuming Zhu <yuming.zhu1@unisoc.com>
> > > Signed-off-by: Cixi Geng <cixi.geng1@unisoc.com>
> > >
> > No blank lines in a tag block (they break people's scripts)
> > Also, if this is a fix, I'd expect a fixes tag.
> I will add in next version
> >
> > > Reviewed-by: Baolin Wang <baolin.wang7@gmail.com>
> > > ---
> > > drivers/iio/adc/sc27xx_adc.c | 4 ++--
> > > 1 file changed, 2 insertions(+), 2 deletions(-)
> > >
> > > diff --git a/drivers/iio/adc/sc27xx_adc.c b/drivers/iio/adc/sc27xx_adc.c
> > > index 00098caf6d9e..aee076c8e2b1 100644
> > > --- a/drivers/iio/adc/sc27xx_adc.c
> > > +++ b/drivers/iio/adc/sc27xx_adc.c
> > > @@ -36,8 +36,8 @@
> > >
> > > /* Bits and mask definition for SC27XX_ADC_CH_CFG register */
> > > #define SC27XX_ADC_CHN_ID_MASK GENMASK(4, 0)
> > > -#define SC27XX_ADC_SCALE_MASK GENMASK(10, 8)
> > > -#define SC27XX_ADC_SCALE_SHIFT 8
> > > +#define SC27XX_ADC_SCALE_MASK GENMASK(10, 9)
> > > +#define SC27XX_ADC_SCALE_SHIFT 9
> >
> > This driver would benefit from use of FIELD_GET() / FIELD_PREP()
> > but that is obviously unrelated to this particular series.
> >
> the next patch in this set need to use the fixed define value

Understood. I was suggesting a future cleanup on top of this series
to avoid the need for both MASK and SHIFT being defined for
each field. FIELD_GET/FIELD_PREP() are used to do that.

What you have in this series is fine without that change.

Jonathan

> >
> > Jonathan
> >
> > >
> > > /* Bits definitions for SC27XX_ADC_INT_EN registers */
> > > #define SC27XX_ADC_IRQ_EN BIT(0)
> >

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