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SubjectRe: [PATCH RFC 01/11] iommu: Add pasid_bits field in struct dev_iommu
From
On 2022/3/22 8:26, Tian, Kevin wrote:
>> From: Lu Baolu <baolu.lu@linux.intel.com>
>> Sent: Monday, March 21, 2022 6:22 PM
>>>> - if (features >= 0)
>>>> + if (features >= 0) {
>>>> info->pasid_supported = features | 1;
>>>> + dev->iommu->pasid_bits =
>>>> + fls(pci_max_pasids(pdev)) - 1;
>>> Original intel_svm_alloc_pasid() covers both PCI and non-PCI devices:
>>>
>>> ioasid_t max_pasid = dev_is_pci(dev) ?
>>> pci_max_pasids(to_pci_dev(dev)) : intel_pasid_max_id;
>>>
>>> though I'm not sure whether non-PCI SVA has been supported indeed, this
>>> patch implies a functional change here.
>>>
>>
>> The info->pasid_supported is only set for PCI devices. So the status is
>> that non-PCI SVA hasn't been supported. No functional change here from
>> this point of view.
>>
>
> Then this information should be included in the commit msg.

Sure.

Best regards,
baolu

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