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    Subject[PATCHv5 08/30] x86/tdx: Add HLT support for TDX guests
    Date
    The HLT instruction is a privileged instruction, executing it stops
    instruction execution and places the processor in a HALT state. It
    is used in kernel for cases like reboot, idle loop and exception fixup
    handlers. For the idle case, interrupts will be enabled (using STI)
    before the HLT instruction (this is also called safe_halt()).

    To support the HLT instruction in TDX guests, it needs to be emulated
    using TDVMCALL (hypercall to VMM). More details about it can be found
    in Intel Trust Domain Extensions (Intel TDX) Guest-Host-Communication
    Interface (GHCI) specification, section TDVMCALL[Instruction.HLT].

    In TDX guests, executing HLT instruction will generate a #VE, which is
    used to emulate the HLT instruction. But #VE based emulation will not
    work for the safe_halt() flavor, because it requires STI instruction to
    be executed just before the TDCALL. Since idle loop is the only user of
    safe_halt() variant, handle it as a special case.

    To avoid *safe_halt() call in the idle function, define the
    tdx_guest_idle() and use it to override the "x86_idle" function pointer
    for a valid TDX guest.

    Alternative choices like PV ops have been considered for adding
    safe_halt() support. But it was rejected because HLT paravirt calls
    only exist under PARAVIRT_XXL, and enabling it in TDX guest just for
    safe_halt() use case is not worth the cost.

    Co-developed-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
    Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
    Reviewed-by: Andi Kleen <ak@linux.intel.com>
    Reviewed-by: Tony Luck <tony.luck@intel.com>
    Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
    Acked-by: Dave Hansen <dave.hansen@linux.intel.com>
    ---
    arch/x86/coco/tdcall.S | 13 ++++++
    arch/x86/coco/tdx.c | 93 +++++++++++++++++++++++++++++++++++++-
    arch/x86/include/asm/tdx.h | 4 ++
    arch/x86/kernel/process.c | 4 ++
    4 files changed, 112 insertions(+), 2 deletions(-)

    diff --git a/arch/x86/coco/tdcall.S b/arch/x86/coco/tdcall.S
    index 4767e0b5f0d9..29e81104d312 100644
    --- a/arch/x86/coco/tdcall.S
    +++ b/arch/x86/coco/tdcall.S
    @@ -138,6 +138,19 @@ SYM_FUNC_START(__tdx_hypercall)

    movl $TDVMCALL_EXPOSE_REGS_MASK, %ecx

    + /*
    + * For the idle loop STI needs to be called directly before the TDCALL
    + * that enters idle (EXIT_REASON_HLT case). STI instruction enables
    + * interrupts only one instruction later. If there is a window between
    + * STI and the instruction that emulates the HALT state, there is a
    + * chance for interrupts to happen in this window, which can delay the
    + * HLT operation indefinitely. Since this is the not the desired
    + * result, conditionally call STI before TDCALL.
    + */
    + testq $TDX_HCALL_ISSUE_STI, %rsi
    + jz .Lskip_sti
    + sti
    +.Lskip_sti:
    tdcall

    /*
    diff --git a/arch/x86/coco/tdx.c b/arch/x86/coco/tdx.c
    index 6b2b738a2ba2..0c8214e1cdb5 100644
    --- a/arch/x86/coco/tdx.c
    +++ b/arch/x86/coco/tdx.c
    @@ -7,6 +7,7 @@
    #include <linux/cpufeature.h>
    #include <asm/coco.h>
    #include <asm/tdx.h>
    +#include <asm/vmx.h>

    /* TDX module Call Leaf IDs */
    #define TDX_GET_INFO 1
    @@ -30,6 +31,17 @@ static inline u64 _tdx_hypercall(u64 fn, u64 r12, u64 r13, u64 r14, u64 r15)
    return __tdx_hypercall(&args, 0);
    }

    +/*
    + * The TDG.VP.VMCALL-Instruction-execution sub-functions are defined
    + * independently from but are currently matched 1:1 with VMX EXIT_REASONs.
    + * Reusing the KVM EXIT_REASON macros makes it easier to connect the host and
    + * guest sides of these calls.
    + */
    +static u64 hcall_func(u64 exit_reason)
    +{
    + return exit_reason;
    +}
    +
    static inline void tdx_module_call(u64 fn, u64 rcx, u64 rdx, u64 r8, u64 r9,
    struct tdx_module_output *out)
    {
    @@ -53,6 +65,62 @@ static void get_info(unsigned int *gpa_width)
    *gpa_width = out.rcx & GENMASK(5, 0);
    }

    +static u64 __cpuidle __halt(const bool irq_disabled, const bool do_sti)
    +{
    + struct tdx_hypercall_args args = {
    + .r10 = TDX_HYPERCALL_STANDARD,
    + .r11 = hcall_func(EXIT_REASON_HLT),
    + .r12 = irq_disabled,
    + };
    +
    + /*
    + * Emulate HLT operation via hypercall. More info about ABI
    + * can be found in TDX Guest-Host-Communication Interface
    + * (GHCI), section 3.8 TDG.VP.VMCALL<Instruction.HLT>.
    + *
    + * The VMM uses the "IRQ disabled" param to understand IRQ
    + * enabled status (RFLAGS.IF) of the TD guest and to determine
    + * whether or not it should schedule the halted vCPU if an
    + * IRQ becomes pending. E.g. if IRQs are disabled, the VMM
    + * can keep the vCPU in virtual HLT, even if an IRQ is
    + * pending, without hanging/breaking the guest.
    + */
    + return __tdx_hypercall(&args, do_sti ? TDX_HCALL_ISSUE_STI : 0);
    +}
    +
    +static bool handle_halt(void)
    +{
    + /*
    + * Since non safe halt is mainly used in CPU offlining
    + * and the guest will always stay in the halt state, don't
    + * call the STI instruction (set do_sti as false).
    + */
    + const bool irq_disabled = irqs_disabled();
    + const bool do_sti = false;
    +
    + if (__halt(irq_disabled, do_sti))
    + return false;
    +
    + return true;
    +}
    +
    +void __cpuidle tdx_safe_halt(void)
    +{
    + /*
    + * For do_sti=true case, __tdx_hypercall() function enables
    + * interrupts using the STI instruction before the TDCALL. So
    + * set irq_disabled as false.
    + */
    + const bool irq_disabled = false;
    + const bool do_sti = true;
    +
    + /*
    + * Use WARN_ONCE() to report the failure.
    + */
    + if (__halt(irq_disabled, do_sti))
    + WARN_ONCE(1, "HLT instruction emulation failed\n");
    +}
    +
    void tdx_get_ve_info(struct ve_info *ve)
    {
    struct tdx_module_output out;
    @@ -76,11 +144,32 @@ void tdx_get_ve_info(struct ve_info *ve)
    ve->instr_info = upper_32_bits(out.r10);
    }

    +/* Handle the kernel #VE */
    +static bool virt_exception_kernel(struct pt_regs *regs, struct ve_info *ve)
    +{
    + switch (ve->exit_reason) {
    + case EXIT_REASON_HLT:
    + return handle_halt();
    + default:
    + pr_warn("Unexpected #VE: %lld\n", ve->exit_reason);
    + return false;
    + }
    +}
    +
    bool tdx_handle_virt_exception(struct pt_regs *regs, struct ve_info *ve)
    {
    - pr_warn("Unexpected #VE: %lld\n", ve->exit_reason);
    + bool ret;
    +
    + if (user_mode(regs))
    + ret = false;
    + else
    + ret = virt_exception_kernel(regs, ve);
    +
    + /* After successful #VE handling, move the IP */
    + if (ret)
    + regs->ip += ve->instr_len;

    - return false;
    + return ret;
    }

    void __init tdx_early_init(void)
    diff --git a/arch/x86/include/asm/tdx.h b/arch/x86/include/asm/tdx.h
    index 8af81ea2779d..1f150e7a2f8f 100644
    --- a/arch/x86/include/asm/tdx.h
    +++ b/arch/x86/include/asm/tdx.h
    @@ -13,6 +13,7 @@
    #define TDX_HYPERCALL_STANDARD 0

    #define TDX_HCALL_HAS_OUTPUT BIT(0)
    +#define TDX_HCALL_ISSUE_STI BIT(1)

    /*
    * SW-defined error codes.
    @@ -87,9 +88,12 @@ void tdx_get_ve_info(struct ve_info *ve);

    bool tdx_handle_virt_exception(struct pt_regs *regs, struct ve_info *ve);

    +void tdx_safe_halt(void);
    +
    #else

    static inline void tdx_early_init(void) { };
    +static inline void tdx_safe_halt(void) { };

    #endif /* CONFIG_INTEL_TDX_GUEST */

    diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c
    index e131d71b3cae..2e90d57cf86e 100644
    --- a/arch/x86/kernel/process.c
    +++ b/arch/x86/kernel/process.c
    @@ -46,6 +46,7 @@
    #include <asm/proto.h>
    #include <asm/frame.h>
    #include <asm/unwind.h>
    +#include <asm/tdx.h>

    #include "process.h"

    @@ -873,6 +874,9 @@ void select_idle_routine(const struct cpuinfo_x86 *c)
    } else if (prefer_mwait_c1_over_halt(c)) {
    pr_info("using mwait in idle threads\n");
    x86_idle = mwait_idle;
    + } else if (cpu_feature_enabled(X86_FEATURE_TDX_GUEST)) {
    + pr_info("using TDX aware idle routine\n");
    + x86_idle = tdx_safe_halt;
    } else
    x86_idle = default_idle;
    }
    --
    2.34.1
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