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    Subject[PATCH 5.16 0162/1039] arm64: dts: qcom: sc7280: Fix incorrect clock name
    Date
    From: Prasad Malisetty <pmaliset@codeaurora.org>

    [ Upstream commit fa09b2248714c64644576d8064e9bd292a504a0e ]

    Replace pcie_1_pipe-clk clock name with pcie_1_pipe_clk
    To match with dt binding.

    Fixes: ab7772de8612 ("arm64: dts: qcom: SC7280: Add rpmhcc clock controller node")
    Signed-off-by: Prasad Malisetty <pmaliset@codeaurora.org>
    Reviewed-by: Stephen Boyd <swboyd@chromium.org>
    Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
    Link: https://lore.kernel.org/r/1637060508-30375-2-git-send-email-pmaliset@codeaurora.org
    Signed-off-by: Sasha Levin <sashal@kernel.org>
    ---
    arch/arm64/boot/dts/qcom/sc7280.dtsi | 2 +-
    1 file changed, 1 insertion(+), 1 deletion(-)

    diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
    index 365a2e04e285b..cb94b877d6246 100644
    --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
    +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
    @@ -576,7 +576,7 @@
    <&rpmhcc RPMH_CXO_CLK_A>, <&sleep_clk>,
    <0>, <0>, <0>, <0>, <0>, <0>;
    clock-names = "bi_tcxo", "bi_tcxo_ao", "sleep_clk",
    - "pcie_0_pipe_clk", "pcie_1_pipe-clk",
    + "pcie_0_pipe_clk", "pcie_1_pipe_clk",
    "ufs_phy_rx_symbol_0_clk", "ufs_phy_rx_symbol_1_clk",
    "ufs_phy_tx_symbol_0_clk",
    "usb3_phy_wrapper_gcc_usb30_pipe_clk";
    --
    2.34.1


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