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    Subject[PATCH 5.16 0166/1039] soc: imx: gpcv2: keep i.MX8MM VPU-H1 bus clock active
    Date
    From: Adam Ford <aford173@gmail.com>

    [ Upstream commit 8361b8b29f9389084b679db854cf733375c64763 ]

    Enable the vpu-h1 clock when the domain is active because reading
    or writing to the VPU-H1 IP block cause the system to hang.

    Fixes: 656ade7aa42a ("soc: imx: gpcv2: keep i.MX8M* bus clocks enabled")
    Signed-off-by: Adam Ford <aford173@gmail.com>
    Reviewed-by: Fabio Estevam <festevam@gmail.com>
    Signed-off-by: Shawn Guo <shawnguo@kernel.org>
    Signed-off-by: Sasha Levin <sashal@kernel.org>
    ---
    drivers/soc/imx/gpcv2.c | 1 +
    1 file changed, 1 insertion(+)

    diff --git a/drivers/soc/imx/gpcv2.c b/drivers/soc/imx/gpcv2.c
    index b8d52d8d29dbb..7b6dfa33dcb9f 100644
    --- a/drivers/soc/imx/gpcv2.c
    +++ b/drivers/soc/imx/gpcv2.c
    @@ -734,6 +734,7 @@ static const struct imx_pgc_domain imx8mm_pgc_domains[] = {
    .map = IMX8MM_VPUH1_A53_DOMAIN,
    },
    .pgc = BIT(IMX8MM_PGC_VPUH1),
    + .keep_clocks = true,
    },

    [IMX8MM_POWER_DOMAIN_DISPMIX] = {
    --
    2.34.1


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