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    Subject[PATCH 5.10 545/563] dmaengine: at_xdmac: Fix at_xdmac_lld struct definition
    Date
    From: Tudor Ambarus <tudor.ambarus@microchip.com>

    commit 912f7c6f7fac273f40e621447cf17d14b50d6e5b upstream.

    The hardware channel next descriptor view structure contains just
    fields of 32 bits, while dma_addr_t can be of type u64 or u32
    depending on CONFIG_ARCH_DMA_ADDR_T_64BIT. Force u32 to comply with
    what the hardware expects.

    Fixes: e1f7c9eee707 ("dmaengine: at_xdmac: creation of the atmel eXtended DMA Controller driver")
    Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
    Link: https://lore.kernel.org/r/20211215110115.191749-11-tudor.ambarus@microchip.com
    Signed-off-by: Vinod Koul <vkoul@kernel.org>
    Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
    ---
    drivers/dma/at_xdmac.c | 18 +++++++++---------
    1 file changed, 9 insertions(+), 9 deletions(-)

    --- a/drivers/dma/at_xdmac.c
    +++ b/drivers/dma/at_xdmac.c
    @@ -221,15 +221,15 @@ struct at_xdmac {

    /* Linked List Descriptor */
    struct at_xdmac_lld {
    - dma_addr_t mbr_nda; /* Next Descriptor Member */
    - u32 mbr_ubc; /* Microblock Control Member */
    - dma_addr_t mbr_sa; /* Source Address Member */
    - dma_addr_t mbr_da; /* Destination Address Member */
    - u32 mbr_cfg; /* Configuration Register */
    - u32 mbr_bc; /* Block Control Register */
    - u32 mbr_ds; /* Data Stride Register */
    - u32 mbr_sus; /* Source Microblock Stride Register */
    - u32 mbr_dus; /* Destination Microblock Stride Register */
    + u32 mbr_nda; /* Next Descriptor Member */
    + u32 mbr_ubc; /* Microblock Control Member */
    + u32 mbr_sa; /* Source Address Member */
    + u32 mbr_da; /* Destination Address Member */
    + u32 mbr_cfg; /* Configuration Register */
    + u32 mbr_bc; /* Block Control Register */
    + u32 mbr_ds; /* Data Stride Register */
    + u32 mbr_sus; /* Source Microblock Stride Register */
    + u32 mbr_dus; /* Destination Microblock Stride Register */
    };

    /* 64-bit alignment needed to update CNDA and CUBC registers in an atomic way. */

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