Messages in this thread |  | | Date | Mon, 26 Jul 2021 00:11:24 -0700 | From | Drew Fustini <> | Subject | Re: [RFC PATH 2/2] gpio: starfive-jh7100: Add StarFive JH7100 GPIO driver |
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On Fri, Jul 23, 2021 at 11:04:41PM +0200, Linus Walleij wrote: > On Thu, Jul 1, 2021 at 8:39 AM Michael Walle <michael@walle.cc> wrote: > > Am 2021-07-01 02:20, schrieb Drew Fustini: > > > Add GPIO driver for the StarFive JH7100 SoC [1] used on the > > > BeagleV Starlight JH7100 board [2]. > > > > > > [1] https://github.com/starfive-tech/beaglev_doc/ > > > [2] https://github.com/beagleboard/beaglev-starlight > > > > > > Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> > > > Signed-off-by: Huan Feng <huan.feng@starfivetech.com> > > > Signed-off-by: Drew Fustini <drew@beagleboard.org> > > > > Could this driver use GPIO_REGMAP and REGMAP_IRQ? See > > drivers/gpio/gpio-sl28cpld.c for an example. > > To me it looks just memory-mapped? > > Good old gpio-mmio.c (select GPIO_GENERIC) should > suffice I think. > > Drew please look at drivers/gpio/gpio-ftgpio010.c for an example > of GPIO_GENERIC calling bgpio_init() in probe().
Thank you for the suggestion. However, I am not sure that will work for this SoC.
The GPIO registers are described in section 12 of JH7100 datasheet [1] and I don't think they fit the expectation of gpio-mmio.c because there is a seperate register for each GPIO line for output data value and output enable.
There are 64 output data config registers which are 4 bytes wide. There are 64 output enable config registers which are 4 bytes wide too. Output data and output enable registers for a given GPIO pad are contiguous. GPIO0_DOUT_CFG is 0x50 and GPIO0_DOEN_CFG is 0x54 while GPIO1_DOUT_CFG is 0x58 and GPIO1_DOEN_CFG is 0x5C. The stride between GPIO pads is effectively 8, which yields the formula: GPIOn_DOUT_CFG is 0x50+8n. Similarly, GPIO0_DOEN_CFG is 0x54 and thus GPIOn_DOEN_CFG is 0x54+8n.
However, GPIO input data does use just one bit for each line. GPIODIN_0 at 0x48 covers GPIO[31:0] and GPIODIN_1 at 0x4c covers GPIO[63:32].
Thus the input could work with gpio-mmio but I am not sure how to reconcile the register-per-gpio for the output value and output enable.
Is there way a way to adapt gpio-mmio for this situation?
Thanks, Drew
[1] https://github.com/starfive-tech/beaglev_doc
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