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Subject[RFC PATCH v2 00/11] Linux RISC-V ACLINT Support
Most of the existing RISC-V platforms use SiFive CLINT to provide M-level
timer and IPI support whereas S-level uses SBI calls for timer and IPI
support. Also, the SiFive CLINT device is a single device providing both
timer and IPI functionality so RISC-V platforms can't partially implement
SiFive CLINT device and provide alternate mechanism for timer and IPI.

The RISC-V Advacned Core Local Interruptor (ACLINT) tries to address the
limitations of SiFive CLINT by:
1) Taking modular approach and defining timer and IPI functionality as
separate devices so that RISC-V platforms can include only required
2) Providing dedicated MMIO device for S-level IPIs so that SBI calls
can be avoided for IPIs in Linux RISC-V
3) Allowing multiple instances of timer and IPI devices for a
multi-socket (or multi-die) NUMA systems
4) Being backward compatible to SiFive CLINT so that existing RISC-V
platforms stay compliant with RISC-V ACLINT specification

Latest RISC-V ACLINT specification (will be frozen in a month) can be
found at:

This series adds RISC-V ACLINT support and can be found in riscv_aclint_v2
branch at:

To test this series, the RISC-V ACLINT support for QEMU and OpenSBI
can be found in the riscv_aclint_v1 branch at:

Changes since v1:
- Added a new PATCH3 to treat IPIs as normal Linux IRQs for RISC-V kernel
- New SBI IPI call based irqchip driver in PATCH3 which is only initialized
by riscv_ipi_setup() when no Linux IRQ numbers are available for IPIs
- Moved DT bindings patches before corresponding driver patches
- Implemented ACLINT SWI driver as a irqchip driver in PATCH7
- Minor nit fixes pointed by Bin Meng

Anup Patel (11):
RISC-V: Clear SIP bit only when using SBI IPI operations
RISC-V: Use common print prefix in smp.c
RISC-V: Treat IPIs as normal Linux IRQs
RISC-V: Allow marking IPIs as suitable for remote FENCEs
RISC-V: Use IPIs for remote TLB flush when possible
dt-bindings: interrupt-controller: Add ACLINT MSWI and SSWI bindings
irqchip: Add ACLINT software interrupt driver
RISC-V: Select ACLINT SWI driver for virt machine
dt-bindings: timer: Add ACLINT MTIMER bindings
clocksource: clint: Add support for ACLINT MTIMER device
MAINTAINERS: Add entry for RISC-V ACLINT drivers

.../riscv,aclint-swi.yaml | 82 ++++++
.../bindings/timer/riscv,aclint-mtimer.yaml | 55 ++++
arch/riscv/Kconfig | 1 +
arch/riscv/Kconfig.socs | 1 +
arch/riscv/include/asm/sbi.h | 2 +
arch/riscv/include/asm/smp.h | 48 +++-
arch/riscv/kernel/Makefile | 1 +
arch/riscv/kernel/cpu-hotplug.c | 2 +
arch/riscv/kernel/irq.c | 1 +
arch/riscv/kernel/sbi-ipi.c | 223 ++++++++++++++
arch/riscv/kernel/sbi.c | 15 -
arch/riscv/kernel/smp.c | 171 +++++------
arch/riscv/kernel/smpboot.c | 4 +-
arch/riscv/mm/tlbflush.c | 62 +++-
drivers/clocksource/timer-clint.c | 58 ++--
drivers/irqchip/Kconfig | 11 +
drivers/irqchip/Makefile | 1 +
drivers/irqchip/irq-aclint-swi.c | 271 ++++++++++++++++++
drivers/irqchip/irq-riscv-intc.c | 55 ++--
20 files changed, 879 insertions(+), 194 deletions(-)
create mode 100644 Documentation/devicetree/bindings/interrupt-controller/riscv,aclint-swi.yaml
create mode 100644 Documentation/devicetree/bindings/timer/riscv,aclint-mtimer.yaml
create mode 100644 arch/riscv/kernel/sbi-ipi.c
create mode 100644 drivers/irqchip/irq-aclint-swi.c


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