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SubjectRe: [PATCH v2] ARM: kprobes: rewrite test-[arm|thumb].c in UAL
On Fri, 29 Jan 2021 at 00:30, Ard Biesheuvel <ardb@kernel.org> wrote:
>
> On Thu, 28 Jan 2021 at 23:28, Arnd Bergmann <arnd@kernel.org> wrote:
> >
> > On Thu, Jan 28, 2021 at 10:03 PM Ard Biesheuvel <ardb@kernel.org> wrote:
> > > On Thu, 28 Jan 2021 at 20:34, Nick Desaulniers <ndesaulniers@google.com> wrote:
> > > > @@ -468,15 +468,15 @@ void kprobe_thumb32_test_cases(void)
> > > >
> > > > TEST_UNSUPPORTED("strexb r0, r1, [r2]")
> > > > TEST_UNSUPPORTED("strexh r0, r1, [r2]")
> > > > - TEST_UNSUPPORTED("strexd r0, r1, [r2]")
> > > > + TEST_UNSUPPORTED("strexd r0, r1, r2, [r2]")
> > > > TEST_UNSUPPORTED("ldrexb r0, [r1]")
> > > > TEST_UNSUPPORTED("ldrexh r0, [r1]")
> > > > - TEST_UNSUPPORTED("ldrexd r0, [r1]")
> > > > + TEST_UNSUPPORTED("ldrexd r0, r1, [r1]")
> > > >
> > > > TEST_GROUP("Data-processing (shifted register) and (modified immediate)")
> > > >
> > > > #define _DATA_PROCESSING32_DNM(op,s,val) \
> > > > - TEST_RR(op s".w r0, r",1, VAL1,", r",2, val, "") \
> > > > + TEST_RR(op s" r0, r",1, VAL1,", r",2, val, "") \
> > >
> > > What is wrong with these .w suffixes? Shouldn't the assembler accept
> > > these even on instructions that only exist in a wide encoding?
> >
> > I don't know if that is a bug in the integrated assembler or
> > intentional behavior, but it may be easier to just change the
> > kernel than the compiler in this case, as it also makes it work
> > for older versions.
> >
> > FWIW, I needed a related change in a couple of other files:
> >
>
> For fully specified test cases, I suppose removing the .w is fine. But
> for the macros below, it really isn't: it depends on the actual
> register assignment whether narrow encodings exist or not, and in that
> case, we definitely want the wide one. The fact that instantiating the
> macro in a different way can only produce wide encodings in the first
> place should really not trigger an error.
>
> Things like this can break the Thumb2 build very subtly, so if the
> integrated assembler is not up to that, we should simply disable it
> for Thumb2 builds.
>

As mentioned in issue #1271, my observation here is not entirely accurate.

In the general case, macros that take register names as inputs can
produce narrow or wide opcodes depending on which exact registers are
being used (narrow opcodes mostly only support registers r0-r7)

However, in this particular case, all the ldr/str instructions are
either the pre-indexed or the post-indexed variants, for which only a
wide encoding exists, and so omitting the .w suffix is safe here.

However, if we apply the change below, can we please document this in
a comment, i.e., that encoding T4 is used for LDR/STR, and so the
result is guaranteed to be wide in spite of the missing suffix?



> > diff --git a/arch/arm/lib/copy_from_user.S b/arch/arm/lib/copy_from_user.S
> > index 6acdfde56849..3ced01d9afe4 100644
> > --- a/arch/arm/lib/copy_from_user.S
> > +++ b/arch/arm/lib/copy_from_user.S
> > @@ -60,7 +60,7 @@
> > #define LDR1W_SHIFT 0
> >
> > .macro ldr1w ptr reg abort
> > - USERL(\abort, W(ldr) \reg, [\ptr], #4)
> > + USERL(\abort, ldr \reg, [\ptr], #4)
> > .endm
> >
> > .macro ldr4w ptr reg1 reg2 reg3 reg4 abort
> > @@ -80,7 +80,7 @@
> > #define STR1W_SHIFT 0
> >
> > .macro str1w ptr reg abort
> > - W(str) \reg, [\ptr], #4
> > + str \reg, [\ptr], #4
> > .endm
> >
> > .macro str8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
> > diff --git a/arch/arm/lib/copy_to_user.S b/arch/arm/lib/copy_to_user.S
> > index 485fa3cffdbe..a6a96f814720 100644
> > --- a/arch/arm/lib/copy_to_user.S
> > +++ b/arch/arm/lib/copy_to_user.S
> > @@ -34,7 +34,7 @@
> > #define LDR1W_SHIFT 0
> >
> > .macro ldr1w ptr reg abort
> > - W(ldr) \reg, [\ptr], #4
> > + ldr \reg, [\ptr], #4
> > .endm
> >
> > .macro ldr4w ptr reg1 reg2 reg3 reg4 abort
> > @@ -77,7 +77,7 @@
> > #define STR1W_SHIFT 0
> >
> > .macro str1w ptr reg abort
> > - USERL(\abort, W(str) \reg, [\ptr], #4)
> > + USERL(\abort, str \reg, [\ptr], #4)
> > .endm
> >
> > .macro str8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
> > diff --git a/arch/arm/lib/memcpy.S b/arch/arm/lib/memcpy.S
> > index e4caf48c089f..7b980a1a4227 100644
> > --- a/arch/arm/lib/memcpy.S
> > +++ b/arch/arm/lib/memcpy.S
> > @@ -15,7 +15,7 @@
> > #define STR1W_SHIFT 0
> >
> > .macro ldr1w ptr reg abort
> > - W(ldr) \reg, [\ptr], #4
> > + ldr \reg, [\ptr], #4
> > .endm
> >
> > .macro ldr4w ptr reg1 reg2 reg3 reg4 abort
> > @@ -31,7 +31,7 @@
> > .endm
> >
> > .macro str1w ptr reg abort
> > - W(str) \reg, [\ptr], #4
> > + str \reg, [\ptr], #4
> > .endm
> >
> > .macro str8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
> > diff --git a/arch/arm/lib/memmove.S b/arch/arm/lib/memmove.S
> > index 6fecc12a1f51..35c5c06b7588 100644
> > --- a/arch/arm/lib/memmove.S
> > +++ b/arch/arm/lib/memmove.S
> > @@ -84,24 +84,24 @@ WEAK(memmove)
> > addne pc, pc, ip @ C is always clear here
> > b 7f
> > 6: W(nop)
> > - W(ldr) r3, [r1, #-4]!
> > - W(ldr) r4, [r1, #-4]!
> > - W(ldr) r5, [r1, #-4]!
> > - W(ldr) r6, [r1, #-4]!
> > - W(ldr) r7, [r1, #-4]!
> > - W(ldr) r8, [r1, #-4]!
> > - W(ldr) lr, [r1, #-4]!
> > + ldr r3, [r1, #-4]!
> > + ldr r4, [r1, #-4]!
> > + ldr r5, [r1, #-4]!
> > + ldr r6, [r1, #-4]!
> > + ldr r7, [r1, #-4]!
> > + ldr r8, [r1, #-4]!
> > + ldr lr, [r1, #-4]!
> >
> > add pc, pc, ip
> > nop
> > W(nop)
> > - W(str) r3, [r0, #-4]!
> > - W(str) r4, [r0, #-4]!
> > - W(str) r5, [r0, #-4]!
> > - W(str) r6, [r0, #-4]!
> > - W(str) r7, [r0, #-4]!
> > - W(str) r8, [r0, #-4]!
> > - W(str) lr, [r0, #-4]!
> > + str r3, [r0, #-4]!
> > + str r4, [r0, #-4]!
> > + str r5, [r0, #-4]!
> > + str r6, [r0, #-4]!
> > + str r7, [r0, #-4]!
> > + str r8, [r0, #-4]!
> > + str lr, [r0, #-4]!
> >
> > CALGN( bcs 2b )

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