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SubjectRe: [PATCH v2 RESEND 3/8] dt-bindings: i2c: exynos5: Add bus clock
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On 04/12/2021 22:58, Sam Protsenko wrote:
> In new Exynos SoCs (like Exynos850) where HSI2C is implemented as a
> part of USIv2 block, there are two clocks provided to HSI2C controller:
> - PCLK: bus clock (APB), provides access to register interface
> - IPCLK: operating IP-core clock; SCL is derived from this one
>
> Both clocks have to be asserted for HSI2C to be functional in that case.
>
> Modify bindings doc to allow specifying bus clock in addition to
> already described operating clock.
>
> Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
> ---
> Changes in v2:
> - Added 'clock-names' property to 'required:' in case of ExynosAutoV9
> - Added example for two clocks case
>
> .../devicetree/bindings/i2c/i2c-exynos5.yaml | 59 +++++++++++++++++--
> 1 file changed, 53 insertions(+), 6 deletions(-)
>


Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>


Best regards,
Krzysztof

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