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    Subject[PATCH v4 01/22] ASoC: dt-bindings: Add binding for Tegra20 S/PDIF
    Date
    Add device-tree binding for Tegra20 S/PDIF controller.

    Reviewed-by: Rob Herring <robh@kernel.org>
    Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
    ---
    .../bindings/sound/nvidia,tegra20-spdif.yaml | 85 +++++++++++++++++++
    1 file changed, 85 insertions(+)
    create mode 100644 Documentation/devicetree/bindings/sound/nvidia,tegra20-spdif.yaml

    diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra20-spdif.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra20-spdif.yaml
    new file mode 100644
    index 000000000000..60a368a132b8
    --- /dev/null
    +++ b/Documentation/devicetree/bindings/sound/nvidia,tegra20-spdif.yaml
    @@ -0,0 +1,85 @@
    +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
    +%YAML 1.2
    +---
    +$id: http://devicetree.org/schemas/sound/nvidia,tegra20-spdif.yaml#
    +$schema: http://devicetree.org/meta-schemas/core.yaml#
    +
    +title: NVIDIA Tegra20 S/PDIF Controller
    +
    +description: |
    + The S/PDIF controller supports both input and output in serial audio
    + digital interface format. The input controller can digitally recover
    + a clock from the received stream. The S/PDIF controller is also used
    + to generate the embedded audio for HDMI output channel.
    +
    +maintainers:
    + - Thierry Reding <treding@nvidia.com>
    + - Jon Hunter <jonathanh@nvidia.com>
    +
    +properties:
    + compatible:
    + const: nvidia,tegra20-spdif
    +
    + reg:
    + maxItems: 1
    +
    + resets:
    + maxItems: 1
    +
    + interrupts:
    + maxItems: 1
    +
    + clocks:
    + minItems: 2
    +
    + clock-names:
    + items:
    + - const: out
    + - const: in
    +
    + dmas:
    + minItems: 2
    +
    + dma-names:
    + items:
    + - const: rx
    + - const: tx
    +
    + "#sound-dai-cells":
    + const: 0
    +
    + nvidia,fixed-parent-rate:
    + description: |
    + Specifies whether board prefers parent clock to stay at a fixed rate.
    + This allows multiple Tegra20 audio components work simultaneously by
    + limiting number of supportable audio rates.
    + type: boolean
    +
    +required:
    + - compatible
    + - reg
    + - resets
    + - interrupts
    + - clocks
    + - clock-names
    + - dmas
    + - dma-names
    + - "#sound-dai-cells"
    +
    +additionalProperties: false
    +
    +examples:
    + - |
    + spdif@70002400 {
    + compatible = "nvidia,tegra20-spdif";
    + reg = <0x70002400 0x200>;
    + interrupts = <77>;
    + clocks = <&clk 99>, <&clk 98>;
    + clock-names = "out", "in";
    + resets = <&rst 10>;
    + dmas = <&apbdma 3>, <&apbdma 3>;
    + dma-names = "rx", "tx";
    + #sound-dai-cells = <0>;
    + };
    +
    +...
    --
    2.33.1
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