lkml.org 
[lkml]   [2021]   [Dec]   [14]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
    Patch in this message
    /
    From
    Subject[PATCH 21/26] x86/mm/cpa: Add support for TDX shared memory
    Date
    TDX steals a bit from the physical address and uses it to indicate
    whether the page is private to the guest (bit set 0) or unprotected
    and shared with the VMM (bit set 1).

    AMD SEV uses a similar scheme, repurposing a bit from the physical address
    to indicate encrypted or decrypted pages.

    The kernel already has the infrastructure to deal with encrypted/decrypted
    pages for AMD SEV. Modify the __set_memory_enc_pgtable() and make it
    aware about TDX.

    After modifying page table entries, the kernel needs to notify VMM about
    the change with tdx_hcall_request_gpa_type().

    Co-developed-by: Sean Christopherson <sean.j.christopherson@intel.com>
    Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
    Co-developed-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
    Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
    Tested-by: Kai Huang <kai.huang@linux.intel.com>
    Reviewed-by: Andi Kleen <ak@linux.intel.com>
    Reviewed-by: Tony Luck <tony.luck@intel.com>
    Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
    ---
    arch/x86/kernel/cc_platform.c | 1 +
    arch/x86/mm/pat/set_memory.c | 39 +++++++++++++++++++++++++++++++----
    2 files changed, 36 insertions(+), 4 deletions(-)

    diff --git a/arch/x86/kernel/cc_platform.c b/arch/x86/kernel/cc_platform.c
    index a0fc329edc35..4a3064bf1eb5 100644
    --- a/arch/x86/kernel/cc_platform.c
    +++ b/arch/x86/kernel/cc_platform.c
    @@ -20,6 +20,7 @@ static bool intel_cc_platform_has(enum cc_attr attr)
    case CC_ATTR_GUEST_UNROLL_STRING_IO:
    case CC_ATTR_HOTPLUG_DISABLED:
    case CC_ATTR_GUEST_TDX:
    + case CC_ATTR_GUEST_MEM_ENCRYPT:
    return true;
    default:
    return false;
    diff --git a/arch/x86/mm/pat/set_memory.c b/arch/x86/mm/pat/set_memory.c
    index b4072115c8ef..3a89966c30a9 100644
    --- a/arch/x86/mm/pat/set_memory.c
    +++ b/arch/x86/mm/pat/set_memory.c
    @@ -32,6 +32,7 @@
    #include <asm/set_memory.h>
    #include <asm/hyperv-tlfs.h>
    #include <asm/mshyperv.h>
    +#include <asm/tdx.h>

    #include "../mm_internal.h"

    @@ -1983,12 +1984,21 @@ int set_memory_global(unsigned long addr, int numpages)
    __pgprot(_PAGE_GLOBAL), 0);
    }

    +static pgprot_t pgprot_cc_mask(bool enc)
    +{
    + if (enc)
    + return pgprot_encrypted(__pgprot(0));
    + else
    + return pgprot_decrypted(__pgprot(0));
    +}
    +
    /*
    * __set_memory_enc_pgtable() is used for the hypervisors that get
    * informed about "encryption" status via page tables.
    */
    static int __set_memory_enc_pgtable(unsigned long addr, int numpages, bool enc)
    {
    + enum tdx_map_type map_type;
    struct cpa_data cpa;
    int ret;

    @@ -1999,8 +2009,11 @@ static int __set_memory_enc_pgtable(unsigned long addr, int numpages, bool enc)
    memset(&cpa, 0, sizeof(cpa));
    cpa.vaddr = &addr;
    cpa.numpages = numpages;
    - cpa.mask_set = enc ? __pgprot(_PAGE_ENC) : __pgprot(0);
    - cpa.mask_clr = enc ? __pgprot(0) : __pgprot(_PAGE_ENC);
    +
    + cpa.mask_set = pgprot_cc_mask(enc);
    + cpa.mask_clr = pgprot_cc_mask(!enc);
    + map_type = enc ? TDX_MAP_PRIVATE : TDX_MAP_SHARED;
    +
    cpa.pgd = init_mm.pgd;

    /* Must avoid aliasing mappings in the highmem code */
    @@ -2008,9 +2021,17 @@ static int __set_memory_enc_pgtable(unsigned long addr, int numpages, bool enc)
    vm_unmap_aliases();

    /*
    - * Before changing the encryption attribute, we need to flush caches.
    + * Before changing the encryption attribute, flush caches.
    + *
    + * For TDX, guest is responsible for flushing caches on private->shared
    + * transition. VMM is responsible for flushing on shared->private.
    */
    - cpa_flush(&cpa, !this_cpu_has(X86_FEATURE_SME_COHERENT));
    + if (cc_platform_has(CC_ATTR_GUEST_TDX)) {
    + if (map_type == TDX_MAP_SHARED)
    + cpa_flush(&cpa, 1);
    + } else {
    + cpa_flush(&cpa, !this_cpu_has(X86_FEATURE_SME_COHERENT));
    + }

    ret = __change_page_attr_set_clr(&cpa, 1);

    @@ -2023,6 +2044,16 @@ static int __set_memory_enc_pgtable(unsigned long addr, int numpages, bool enc)
    */
    cpa_flush(&cpa, 0);

    + /*
    + * For TDX Guest, raise hypercall to request memory mapping
    + * change with the VMM.
    + */
    + if (!ret && cc_platform_has(CC_ATTR_GUEST_TDX)) {
    + ret = tdx_hcall_request_gpa_type(__pa(addr),
    + __pa(addr) + numpages * PAGE_SIZE,
    + map_type);
    + }
    +
    /*
    * Notify hypervisor that a given memory range is mapped encrypted
    * or decrypted.
    --
    2.32.0
    \
     
     \ /
      Last update: 2021-12-14 16:05    [W:7.013 / U:3.616 seconds]
    ©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site