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SubjectRe: [PATCH 5/9] drm/i915/gvt: Constify gvt_mmio_block
Date
On 12/4/2021 12:55 PM, Rikard Falkeborn wrote:
> These are never modified, so make them const to allow the compiler to
> put it in read-only memory.
>
> Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com>
> ---
> drivers/gpu/drm/i915/gvt/gvt.h | 2 +-
> drivers/gpu/drm/i915/gvt/handlers.c | 12 ++++++------
> 2 files changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gvt/gvt.h b/drivers/gpu/drm/i915/gvt/gvt.h
> index 0c0615602343..0ebffc327528 100644
> --- a/drivers/gpu/drm/i915/gvt/gvt.h
> +++ b/drivers/gpu/drm/i915/gvt/gvt.h
> @@ -272,7 +272,7 @@ struct intel_gvt_mmio {
> /* Value of command write of this reg needs to be patched */
> #define F_CMD_WRITE_PATCH (1 << 8)
>
> - struct gvt_mmio_block *mmio_block;
> + const struct gvt_mmio_block *mmio_block;
> unsigned int num_mmio_block;
>
> DECLARE_HASHTABLE(mmio_info_table, INTEL_GVT_MMIO_HASH_BITS);
> diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c
> index cde0a477fb49..5e85a77da257 100644
> --- a/drivers/gpu/drm/i915/gvt/handlers.c
> +++ b/drivers/gpu/drm/i915/gvt/handlers.c
> @@ -3627,11 +3627,11 @@ static int init_bxt_mmio_info(struct intel_gvt *gvt)
> return 0;
> }
>
> -static struct gvt_mmio_block *find_mmio_block(struct intel_gvt *gvt,
> - unsigned int offset)
> +static const struct gvt_mmio_block *find_mmio_block(struct intel_gvt *gvt,
> + unsigned int offset)
> {
> unsigned long device = intel_gvt_get_device_type(gvt);
> - struct gvt_mmio_block *block = gvt->mmio.mmio_block;
> + const struct gvt_mmio_block *block = gvt->mmio.mmio_block;
> int num = gvt->mmio.num_mmio_block;
> int i;
>
> @@ -3670,7 +3670,7 @@ void intel_gvt_clean_mmio_info(struct intel_gvt *gvt)
> * accessible (should have no F_CMD_ACCESS flag).
> * otherwise, need to update cmd_reg_handler in cmd_parser.c
> */
> -static struct gvt_mmio_block mmio_blocks[] = {
> +static const struct gvt_mmio_block mmio_blocks[] = {
> {D_SKL_PLUS, _MMIO(DMC_MMIO_START_RANGE), 0x3000, NULL, NULL},
> {D_ALL, _MMIO(MCHBAR_MIRROR_BASE_SNB), 0x40000, NULL, NULL},
> {D_ALL, _MMIO(VGT_PVINFO_PAGE), VGT_PVINFO_SIZE,
> @@ -3753,7 +3753,7 @@ int intel_gvt_for_each_tracked_mmio(struct intel_gvt *gvt,
> int (*handler)(struct intel_gvt *gvt, u32 offset, void *data),
> void *data)
> {
> - struct gvt_mmio_block *block = gvt->mmio.mmio_block;
> + const struct gvt_mmio_block *block = gvt->mmio.mmio_block;
> struct intel_gvt_mmio_info *e;
> int i, j, ret;
>
> @@ -3871,7 +3871,7 @@ int intel_vgpu_mmio_reg_rw(struct intel_vgpu *vgpu, unsigned int offset,
> struct drm_i915_private *i915 = vgpu->gvt->gt->i915;
> struct intel_gvt *gvt = vgpu->gvt;
> struct intel_gvt_mmio_info *mmio_info;
> - struct gvt_mmio_block *mmio_block;
> + const struct gvt_mmio_block *mmio_block;
> gvt_mmio_func func;
> int ret;
>

Reviewed-by: Zhi Wang <zhi.a.wang@intel.com>

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