Messages in this thread |  | | From | Will Deacon <> | Subject | Re: [PATCH v6 00/15] arm64: Self-hosted trace related errata workarounds | Date | Thu, 21 Oct 2021 18:11:17 +0100 |
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On Tue, 19 Oct 2021 17:31:38 +0100, Suzuki K Poulose wrote: > This series adds CPU erratum work arounds related to the self-hosted > tracing. The list of affected errata handled in this series are : > > * TRBE may overwrite trace in FILL mode > - Arm Neoverse-N2 #2139208 > - Cortex-A710 #211985 > > [...]
Applied first four patches to arm64 (for-next/trbe-errata), thanks!
[01/15] arm64: Add Neoverse-N2, Cortex-A710 CPU part definition https://git.kernel.org/arm64/c/2d0d656700d6 [02/15] arm64: errata: Add detection for TRBE overwrite in FILL mode https://git.kernel.org/arm64/c/b9d216fcef42 [03/15] arm64: errata: Add workaround for TSB flush failures https://git.kernel.org/arm64/c/fa82d0b4b833 [04/15] arm64: errata: Add detection for TRBE write to out-of-range https://git.kernel.org/arm64/c/8d81b2a38ddf
Mathieu -- feel free to pull this into the coresight tree, as I won't be rebasing it.
Cheers, -- Will
https://fixes.arm64.dev https://next.arm64.dev https://will.arm64.dev
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