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SubjectRe: [PATCH v16 6/7] arm64: dts: mt8192: add svs device information
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Il 28/04/21 08:54, Roger Lu ha scritto:
> add compitable/reg/irq/clock/efuse/reset setting in svs node
>
> Signed-off-by: Roger Lu <roger.lu@mediatek.com>
> ---
> arch/arm64/boot/dts/mediatek/mt8192.dtsi | 34 ++++++++++++++++++++++++
> 1 file changed, 34 insertions(+)
>

Hello Roger,

thanks for this series! However, there is an issue with this patch:

> diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> index fe24cc66ff7a..e9816a56d87b 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> @@ -270,6 +270,14 @@
> compatible = "mediatek,mt8192-infracfg", "syscon";
> reg = <0 0x10001000 0 0x1000>;
> #clock-cells = <1>;
> +
> + infracfg_rst: reset-controller {
> + compatible = "mediatek,infra-reset", "ti,syscon-reset";
> + #reset-cells = <1>;
> + ti,reset-bits = <
> + 0x150 5 0x154 5 0 0 (ASSERT_SET | DEASSERT_SET | STATUS_NONE) /* 0: svs */

You are using macros here, which are defined in dt-bindings/reset/ti-syscon.h

hovever, you are not including this header in this devicetree, so it's not

compiling.



Please fix it.

> + >;
> + };
> };
>
> pericfg: syscon@10003000 {
> @@ -564,6 +572,20 @@
> status = "disabled";
> };
>
> + svs: svs@1100b000 {
> + compatible = "mediatek,mt8192-svs";
> + reg = <0 0x1100b000 0 0x1000>;
> + interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH 0>;
> + clocks = <&infracfg CLK_INFRA_THERM>;
> + clock-names = "main";
> + nvmem-cells = <&svs_calibration>,
> + <&lvts_e_data1>;
> + nvmem-cell-names = "svs-calibration-data",
> + "t-calibration-data";
> + resets = <&infracfg_rst 0>;
> + reset-names = "svs_rst";
> + };
> +
> spi1: spi@11010000 {
> compatible = "mediatek,mt8192-spi",
> "mediatek,mt6765-spi";
> @@ -681,6 +703,18 @@
> #clock-cells = <1>;
> };
>
> + efuse: efuse@11c10000 {
> + compatible = "mediatek,efuse";
> + reg = <0 0x11c10000 0 0x1000>;
> +

arch/arm64/boot/dts/mediatek/mt8192.dtsi:510.5-24: Warning (reg_format):
/soc/efuse@11c10000/data1:reg: property has invalid length (8 bytes)
(#address-cells == 2, #size-cells == 1)



arch/arm64/boot/dts/mediatek/mt8192.dtsi:513.5-24: Warning (reg_format):
/soc/efuse@11c10000/calib@580:reg: property has invalid length (8 bytes)
(#address-cells == 2, #size-cells == 1)





In short, you should add here:

#address-cells = <1>;

#size-cells = <1>;

> + lvts_e_data1: data1 {
> + reg = <0x1C0 0x58>;
> + };
> + svs_calibration: calib@580 {
> + reg = <0x580 0x68>;
> + };
> + };
> +
> i2c3: i2c3@11cb0000 {
> compatible = "mediatek,mt8192-i2c";
> reg = <0 0x11cb0000 0 0x1000>,
>

P.S.: Sorry for the double email, the previous one got sent with the wrong
address.


Regards,

- Angelo

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