Messages in this thread Patch in this message |  | | From | Naveen Naidu <> | Subject | [PATCH v2 01/24] PCI: Add PCI_ERROR_RESPONSE and it's related definitions | Date | Fri, 15 Oct 2021 19:58:16 +0530 |
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An MMIO read from a PCI device that doesn't exist or doesn't respond causes a PCI error. There's no real data to return to satisfy the CPU read, so most hardware fabricates ~0 data.
Add a PCI_ERROR_RESPONSE definition for that and use it where appropriate to make these checks consistent and easier to find.
Also add helper definitions SET_PCI_ERROR_RESPONSE and RESPONSE_IS_PCI_ERROR to make the code more readable.
Suggested-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Naveen Naidu <naveennaidu479@gmail.com> --- include/linux/pci.h | 9 +++++++++ 1 file changed, 9 insertions(+)
diff --git a/include/linux/pci.h b/include/linux/pci.h index cd8aa6fce204..928c589bb5c4 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -154,6 +154,15 @@ enum pci_interrupt_pin { /* The number of legacy PCI INTx interrupts */ #define PCI_NUM_INTX 4 +/* + * Reading from a device that doesn't respond typically returns ~0. A + * successful read from a device may also return ~0, so you need additional + * information to reliably identify errors. + */ +#define PCI_ERROR_RESPONSE (~0ULL) +#define SET_PCI_ERROR_RESPONSE(val) (*val = ((typeof(*val)) PCI_ERROR_RESPONSE)) +#define RESPONSE_IS_PCI_ERROR(val) (*val == ((typeof(*val)) PCI_ERROR_RESPONSE)) + /* * pci_power_t values must match the bits in the Capabilities PME_Support * and Control/Status PowerState fields in the Power Management capability. -- 2.25.1
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