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SubjectRe: [PATCH v5 net-next 00/18] net: mvpp2: Add TX Flow Control support
On Thu, 28 Jan 2021 20:31:04 +0200 wrote:
> From: Stefan Chulski <>
> Armada hardware has a pause generation mechanism in GOP (MAC).
> The GOP generate flow control frames based on an indication programmed in Ports Control 0 Register. There is a bit per port.
> However assertion of the PortX Pause bits in the ports control 0 register only sends a one time pause.
> To complement the function the GOP has a mechanism to periodically send pause control messages based on periodic counters.
> This mechanism ensures that the pause is effective as long as the Appropriate PortX Pause is asserted.
> Problem is that Packet Processor that actually can drop packets due to lack of resources not connected to the GOP flow control generation mechanism.
> To solve this issue Armada has firmware running on CM3 CPU dedicated for Flow Control support.
> Firmware monitors Packet Processor resources and asserts XON/XOFF by writing to Ports Control 0 Register.
> MSS shared SRAM memory used to communicate between CM3 firmware and PP2 driver.
> During init PP2 driver informs firmware about used BM pools, RXQs, congestion and depletion thresholds.
> The pause frames are generated whenever congestion or depletion in resources is detected.
> The back pressure is stopped when the resource reaches a sufficient level.
> So the congestion/depletion and sufficient level implement a hysteresis that reduces the XON/XOFF toggle frequency.
> Packet Processor v23 hardware introduces support for RX FIFO fill level monitor.
> Patch "add PPv23 version definition" to differ between v23 and v22 hardware.
> Patch "add TX FC firmware check" verifies that CM3 firmware supports Flow Control monitoring.

Hi Stefan, looks like patchwork and lore didn't get all the emails:

Unless it fixes itself soon - please repost.

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