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Subjectdrivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c:1405:12: warning: stack frame size of 1072 bytes in function 'cdns_mhdp_link_up'
tree:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head: 1d94330a437a573cfdf848f6743b1ed169242c8a
commit: 6a6155f664e31c9be43cd690541a9a682ba3dc22 ubsan: introduce CONFIG_UBSAN_LOCAL_BOUNDS for Clang
date: 3 months ago
config: mips-randconfig-r023-20210116 (attached as .config)
compiler: clang version 12.0.0 (https://github.com/llvm/llvm-project d7bc3b7ce23b664d6620cdc32370a8614523ca2f)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# install mips cross compiling tool for clang build
# apt-get install binutils-mips-linux-gnu
# https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=6a6155f664e31c9be43cd690541a9a682ba3dc22
git remote add linus https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
git fetch --no-tags linus master
git checkout 6a6155f664e31c9be43cd690541a9a682ba3dc22
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=mips

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All warnings (new ones prefixed by >>):

>> drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c:1405:12: warning: stack frame size of 1072 bytes in function 'cdns_mhdp_link_up' [-Wframe-larger-than=]
static int cdns_mhdp_link_up(struct cdns_mhdp_device *mhdp)
^
1 warning generated.


vim +/cdns_mhdp_link_up +1405 drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c

fb43aa0acdfd600c Swapnil Jakhade 2020-09-18 1404
fb43aa0acdfd600c Swapnil Jakhade 2020-09-18 @1405 static int cdns_mhdp_link_up(struct cdns_mhdp_device *mhdp)
fb43aa0acdfd600c Swapnil Jakhade 2020-09-18 1406 {
fb43aa0acdfd600c Swapnil Jakhade 2020-09-18 1407 u8 dpcd[DP_RECEIVER_CAP_SIZE], amp[2];
fb43aa0acdfd600c Swapnil Jakhade 2020-09-18 1408 u32 resp, interval, interval_us;
fb43aa0acdfd600c Swapnil Jakhade 2020-09-18 1409 u8 ext_cap_chk = 0;
fb43aa0acdfd600c Swapnil Jakhade 2020-09-18 1410 unsigned int addr;
fb43aa0acdfd600c Swapnil Jakhade 2020-09-18 1411 int err;
fb43aa0acdfd600c Swapnil Jakhade 2020-09-18 1412
fb43aa0acdfd600c Swapnil Jakhade 2020-09-18 1413 WARN_ON(!mutex_is_locked(&mhdp->link_mutex));
fb43aa0acdfd600c Swapnil Jakhade 2020-09-18 1414
fb43aa0acdfd600c Swapnil Jakhade 2020-09-18 1415 drm_dp_dpcd_readb(&mhdp->aux, DP_TRAINING_AUX_RD_INTERVAL,
fb43aa0acdfd600c Swapnil Jakhade 2020-09-18 1416 &ext_cap_chk);
fb43aa0acdfd600c Swapnil Jakhade 2020-09-18 1417
fb43aa0acdfd600c Swapnil Jakhade 2020-09-18 1418 if (ext_cap_chk & DP_EXTENDED_RECEIVER_CAP_FIELD_PRESENT)
fb43aa0acdfd600c Swapnil Jakhade 2020-09-18 1419 addr = DP_DP13_DPCD_REV;
fb43aa0acdfd600c Swapnil Jakhade 2020-09-18 1420 else
fb43aa0acdfd600c Swapnil Jakhade 2020-09-18 1421 addr = DP_DPCD_REV;
fb43aa0acdfd600c Swapnil Jakhade 2020-09-18 1422
fb43aa0acdfd600c Swapnil Jakhade 2020-09-18 1423 err = drm_dp_dpcd_read(&mhdp->aux, addr, dpcd, DP_RECEIVER_CAP_SIZE);
fb43aa0acdfd600c Swapnil Jakhade 2020-09-18 1424 if (err < 0) {
fb43aa0acdfd600c Swapnil Jakhade 2020-09-18 1425 dev_err(mhdp->dev, "Failed to read receiver capabilities\n");
fb43aa0acdfd600c Swapnil Jakhade 2020-09-18 1426 return err;
fb43aa0acdfd600c Swapnil Jakhade 2020-09-18 1427 }
fb43aa0acdfd600c Swapnil Jakhade 2020-09-18 1428
fb43aa0acdfd600c Swapnil Jakhade 2020-09-18 1429 mhdp->link.revision = dpcd[0];
fb43aa0acdfd600c Swapnil Jakhade 2020-09-18 1430 mhdp->link.rate = drm_dp_bw_code_to_link_rate(dpcd[1]);
fb43aa0acdfd600c Swapnil Jakhade 2020-09-18 1431 mhdp->link.num_lanes = dpcd[2] & DP_MAX_LANE_COUNT_MASK;
fb43aa0acdfd600c Swapnil Jakhade 2020-09-18 1432
fb43aa0acdfd600c Swapnil Jakhade 2020-09-18 1433 if (dpcd[2] & DP_ENHANCED_FRAME_CAP)
fb43aa0acdfd600c Swapnil Jakhade 2020-09-18 1434 mhdp->link.capabilities |= DP_LINK_CAP_ENHANCED_FRAMING;
fb43aa0acdfd600c Swapnil Jakhade 2020-09-18 1435
fb43aa0acdfd600c Swapnil Jakhade 2020-09-18 1436 dev_dbg(mhdp->dev, "Set sink device power state via DPCD\n");
fb43aa0acdfd600c Swapnil Jakhade 2020-09-18 1437 cdns_mhdp_link_power_up(&mhdp->aux, &mhdp->link);
fb43aa0acdfd600c Swapnil Jakhade 2020-09-18 1438
fb43aa0acdfd600c Swapnil Jakhade 2020-09-18 1439 cdns_mhdp_fill_sink_caps(mhdp, dpcd);
fb43aa0acdfd600c Swapnil Jakhade 2020-09-18 1440
fb43aa0acdfd600c Swapnil Jakhade 2020-09-18 1441 mhdp->link.rate = cdns_mhdp_max_link_rate(mhdp);
fb43aa0acdfd600c Swapnil Jakhade 2020-09-18 1442 mhdp->link.num_lanes = cdns_mhdp_max_num_lanes(mhdp);
fb43aa0acdfd600c Swapnil Jakhade 2020-09-18 1443
fb43aa0acdfd600c Swapnil Jakhade 2020-09-18 1444 /* Disable framer for link training */
fb43aa0acdfd600c Swapnil Jakhade 2020-09-18 1445 err = cdns_mhdp_reg_read(mhdp, CDNS_DP_FRAMER_GLOBAL_CONFIG, &resp);
fb43aa0acdfd600c Swapnil Jakhade 2020-09-18 1446 if (err < 0) {
fb43aa0acdfd600c Swapnil Jakhade 2020-09-18 1447 dev_err(mhdp->dev,
fb43aa0acdfd600c Swapnil Jakhade 2020-09-18 1448 "Failed to read CDNS_DP_FRAMER_GLOBAL_CONFIG %d\n",
fb43aa0acdfd600c Swapnil Jakhade 2020-09-18 1449 err);
fb43aa0acdfd600c Swapnil Jakhade 2020-09-18 1450 return err;
fb43aa0acdfd600c Swapnil Jakhade 2020-09-18 1451 }
fb43aa0acdfd600c Swapnil Jakhade 2020-09-18 1452
fb43aa0acdfd600c Swapnil Jakhade 2020-09-18 1453 resp &= ~CDNS_DP_FRAMER_EN;
fb43aa0acdfd600c Swapnil Jakhade 2020-09-18 1454 cdns_mhdp_reg_write(mhdp, CDNS_DP_FRAMER_GLOBAL_CONFIG, resp);
fb43aa0acdfd600c Swapnil Jakhade 2020-09-18 1455
fb43aa0acdfd600c Swapnil Jakhade 2020-09-18 1456 /* Spread AMP if required, enable 8b/10b coding */
fb43aa0acdfd600c Swapnil Jakhade 2020-09-18 1457 amp[0] = cdns_mhdp_get_ssc_supported(mhdp) ? DP_SPREAD_AMP_0_5 : 0;
fb43aa0acdfd600c Swapnil Jakhade 2020-09-18 1458 amp[1] = DP_SET_ANSI_8B10B;
fb43aa0acdfd600c Swapnil Jakhade 2020-09-18 1459 drm_dp_dpcd_write(&mhdp->aux, DP_DOWNSPREAD_CTRL, amp, 2);
fb43aa0acdfd600c Swapnil Jakhade 2020-09-18 1460
fb43aa0acdfd600c Swapnil Jakhade 2020-09-18 1461 if (mhdp->host.fast_link & mhdp->sink.fast_link) {
fb43aa0acdfd600c Swapnil Jakhade 2020-09-18 1462 dev_err(mhdp->dev, "fastlink not supported\n");
fb43aa0acdfd600c Swapnil Jakhade 2020-09-18 1463 return -EOPNOTSUPP;
fb43aa0acdfd600c Swapnil Jakhade 2020-09-18 1464 }
fb43aa0acdfd600c Swapnil Jakhade 2020-09-18 1465
fb43aa0acdfd600c Swapnil Jakhade 2020-09-18 1466 interval = dpcd[DP_TRAINING_AUX_RD_INTERVAL] & DP_TRAINING_AUX_RD_MASK;
fb43aa0acdfd600c Swapnil Jakhade 2020-09-18 1467 interval_us = cdns_mhdp_get_training_interval_us(mhdp, interval);
fb43aa0acdfd600c Swapnil Jakhade 2020-09-18 1468 if (!interval_us ||
fb43aa0acdfd600c Swapnil Jakhade 2020-09-18 1469 cdns_mhdp_link_training(mhdp, interval_us)) {
fb43aa0acdfd600c Swapnil Jakhade 2020-09-18 1470 dev_err(mhdp->dev, "Link training failed. Exiting.\n");
fb43aa0acdfd600c Swapnil Jakhade 2020-09-18 1471 return -EIO;
fb43aa0acdfd600c Swapnil Jakhade 2020-09-18 1472 }
fb43aa0acdfd600c Swapnil Jakhade 2020-09-18 1473
fb43aa0acdfd600c Swapnil Jakhade 2020-09-18 1474 mhdp->link_up = true;
fb43aa0acdfd600c Swapnil Jakhade 2020-09-18 1475
fb43aa0acdfd600c Swapnil Jakhade 2020-09-18 1476 return 0;
fb43aa0acdfd600c Swapnil Jakhade 2020-09-18 1477 }
fb43aa0acdfd600c Swapnil Jakhade 2020-09-18 1478

:::::: The code at line 1405 was first introduced by commit
:::::: fb43aa0acdfd600c75b8c877bdf9f6e9893ffc9b drm: bridge: Add support for Cadence MHDP8546 DPI/DP bridge

:::::: TO: Swapnil Jakhade <sjakhade@cadence.com>
:::::: CC: Tomi Valkeinen <tomi.valkeinen@ti.com>

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
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