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SubjectRe: [PATCH v2 0/2] INVD intercept change to skip instruction
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On 24/09/20 23:20, Jim Mattson wrote:
> On Thu, Sep 24, 2020 at 11:42 AM Tom Lendacky <thomas.lendacky@amd.com> wrote:
>>
>> From: Tom Lendacky <thomas.lendacky@amd.com>
>>
>> This series updates the INVD intercept support for both SVM and VMX to
>> skip the instruction rather than emulating it, since emulation of this
>> instruction is just a NOP.
>
> Isn't INVD a serializing instruction, whereas NOP isn't? IIRC, Intel
> doesn't architect VM-entry or VM-exit as serializing, though they
> probably are in practice. I'm not sure what AMD's stance on this is.

Of course that isn't changed by this patch, though.

Queuing both, but a clarification would be useful. The same applies
even to CPUID.

Paolo

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