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SubjectRe: [PATCH v8 2/3] drm: bridge: Add support for Cadence MHDP DPI/DP bridge
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Hi Swapnil,

On 06/08/2020 14:34, Swapnil Jakhade wrote:
> Add a new DRM bridge driver for Cadence MHDP DPTX IP used in TI J721e SoC.
> MHDP DPTX IP is the component that complies with VESA DisplayPort (DP) and
> embedded Display Port (eDP) standards. It integrates uCPU running the
> embedded Firmware (FW) interfaced over APB interface.
>
> Basically, it takes a DPI stream as input and outputs it encoded in DP
> format. Currently, it supports only SST mode.
>
> Co-developed-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
> Co-developed-by: Jyri Sarha <jsarha@ti.com>
> Signed-off-by: Jyri Sarha <jsarha@ti.com>
> Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com>
> Signed-off-by: Yuti Amonkar <yamonkar@cadence.com>
> Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
> ---

<snip>

> + mhdp_state = to_cdns_mhdp_bridge_state(new_state);
> +
> + mhdp_state->current_mode = drm_mode_duplicate(bridge->dev, mode);
> + drm_mode_set_name(mhdp_state->current_mode);
> +

current_mode is never freed, so this leaks memory.

Tomi

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