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Subject[PATCH v5 1/3] dt-bindings: interrupt-controller: Add Actions SIRQ controller binding
Date
Actions Semi Owl SoCs SIRQ interrupt controller is found in S500, S700
and S900 SoCs and provides support for handling up to 3 external
interrupt lines.

Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
---
Changes in v5:
- Updated controller description statements both in the commit message
and the binding doc

.../actions,owl-sirq.yaml | 68 +++++++++++++++++++
1 file changed, 68 insertions(+)
create mode 100644 Documentation/devicetree/bindings/interrupt-controller/actions,owl-sirq.yaml

diff --git a/Documentation/devicetree/bindings/interrupt-controller/actions,owl-sirq.yaml b/Documentation/devicetree/bindings/interrupt-controller/actions,owl-sirq.yaml
new file mode 100644
index 000000000000..cf9b7a514e4e
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/actions,owl-sirq.yaml
@@ -0,0 +1,68 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/interrupt-controller/actions,owl-sirq.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Actions Semi Owl SoCs SIRQ interrupt controller
+
+maintainers:
+ - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
+ - Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
+
+description: |
+ This interrupt controller is found in the Actions Semi Owl SoCs (S500, S700
+ and S900) and provides support for handling up to 3 external interrupt lines.
+
+properties:
+ compatible:
+ oneOf:
+ - items:
+ - enum:
+ - actions,s500-sirq
+ - actions,s700-sirq
+ - actions,s900-sirq
+ - const: actions,owl-sirq
+ - const: actions,owl-sirq
+
+ reg:
+ maxItems: 1
+
+ interrupt-controller: true
+
+ '#interrupt-cells':
+ const: 2
+ description:
+ The first cell is the input IRQ number, between 0 and 2, while the second
+ cell is the trigger type as defined in interrupt.txt in this directory.
+
+ 'actions,ext-interrupts':
+ description: |
+ Contains the GIC SPI IRQ numbers mapped to the external interrupt
+ lines. They shall be specified sequentially from output 0 to 2.
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ minItems: 3
+ maxItems: 3
+
+required:
+ - compatible
+ - reg
+ - interrupt-controller
+ - '#interrupt-cells'
+ - 'actions,ext-interrupts'
+
+additionalProperties: false
+
+examples:
+ - |
+ sirq: interrupt-controller@b01b0200 {
+ compatible = "actions,s500-sirq", "actions,owl-sirq";
+ reg = <0xb01b0200 0x4>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ actions,ext-interrupts = <13>, /* SIRQ0 */
+ <14>, /* SIRQ1 */
+ <15>; /* SIRQ2 */
+ };
+
+...
--
2.28.0
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