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SubjectRe: [PATCH v3 2/2] ASoC: Intel: Add period size constraint on strago board
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On 8/12/20 11:08 AM, Lu, Brent wrote:
>>>
>>> I also wonder what's really missing, too :)
>>>
>>> BTW, I took a look back at the thread, and CRAS seems using a very
>>> large buffer, namely:
>>> [ 52.434791] sound pcmC1D0p: PERIOD_SIZE [240:240]
>>> [ 52.434802] sound pcmC1D0p: BUFFER_SIZE [204480:204480]
>>
>> yes, that's 852 periods and 4.260 seconds. Never seen such values :-)
>
> CRAS calls snd_pcm_hw_params_set_buffer_size_max() to use as large
> buffer as possible. So the period size is an arbitrary number in different
> platforms. Atom SST platform happens to be 256, and CML SOF platform
> is 1056 for example.

ok, but earlier in this thread it was mentioned that values such as 432
are not suitable. the statement above seems to mean the period actual
value is a "don't care", so I don't quite see why this specific patch2
restricting the value to 240 is necessary. Patch1 is needed for sure,
Patch2 is where Takashi and I are not convinced.

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