Messages in this thread |  | | Date | Fri, 10 Jul 2020 10:43:59 +0930 | From | "Andrew Jeffery" <> | Subject | Re: [PATCH 2/2] mmc: sdhci-of-aspeed: Fix clock divider calculation |
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On Fri, 10 Jul 2020, at 05:27, Eddie James wrote: > When calculating the clock divider, start dividing at 2 instead of 1. > The divider is divided by two at the end of the calculation, so starting > at 1 may result in a divider of 0, which shouldn't happen. > > Signed-off-by: Eddie James <eajames@linux.ibm.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
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