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Subject[PATCH 0/2] clk: Aspeed: Fix eMMC clock speeds
There were two problems affecting clock speeds to the eMMC chip. Firstly, the
AST2600 clock was not muxed correctly to be derived from the MPLL. Secondly,
the SDHCI clock control divider was not calculated correctly. This series
addresses these problems.

Eddie James (2):
clk: AST2600: Add mux for EMMC clock
mmc: sdhci-of-aspeed: Fix clock divider calculation

drivers/clk/clk-ast2600.c | 49 +++++++++++++++++++++++++-----
drivers/mmc/host/sdhci-of-aspeed.c | 2 +-
2 files changed, 42 insertions(+), 9 deletions(-)


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