Messages in this thread |  | | Date | Sat, 25 Jul 2020 14:32:53 +0000 | From | Alexander Lobakin <> | Subject | Re: [PATCH] mips: Do not include hi and lo in clobber list for R6 |
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Hi Romain,
From: Romain Naour <romain.naour@gmail.com> Date: Sat, 25 Jul 2020 15:25:33 +0200
> From [1] > "GCC 10 (PR 91233) won't silently allow registers that are not architecturally > available to be present in the clobber list anymore, resulting in build failure > for mips*r6 targets in form of: > ... > .../sysdep.h:146:2: error: the register ‘lo’ cannot be clobbered in ‘asm’ for the current target > 146 | __asm__ volatile ( \ > | ^~~~~~~ > > This is because base R6 ISA doesn't define hi and lo registers w/o DSP extension. > This patch provides the alternative clobber list for r6 targets that won't include > those registers." > > Since kernel 5.4 and mips support for generic vDSO [2], the kernel fail to build > for mips r6 cpus with gcc 10 for the same reason as glibc. > > [1] https://sourceware.org/git/?p=glibc.git;a=commit;h=020b2a97bb15f807c0482f0faee2184ed05bcad8 > [2] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=24640f233b466051ad3a5d2786d2951e43026c9d > > Signed-off-by: Romain Naour <romain.naour@gmail.com> > --- > arch/mips/include/asm/vdso/gettimeofday.h | 45 +++++++++++++++++++++++ > 1 file changed, 45 insertions(+) > > diff --git a/arch/mips/include/asm/vdso/gettimeofday.h b/arch/mips/include/asm/vdso/gettimeofday.h > index c63ddcaea54c..6192d94928b9 100644 > --- a/arch/mips/include/asm/vdso/gettimeofday.h > +++ b/arch/mips/include/asm/vdso/gettimeofday.h > @@ -30,12 +30,21 @@ static __always_inline long gettimeofday_fallback( > register long nr asm("v0") = __NR_gettimeofday; > register long error asm("a3"); > > +#if __mips_isa_rev >= 6
You should use MIPS_ISA_REV macro from arch/mips/include/asm/isa-rev.h instead of compiler definitions. The main reason is that __mips_isa_rev is not defined by GCC for pre-MIPS32 processors, so you'll get a compiler warning like:
"Warning: macro '__mips_isa_rev' is not defined, evaluates to 0"
MIPS_ISA_REV handles this case and is always defined regardless of the actual ISA family.
> + asm volatile( > + " syscall\n" > + : "=r" (ret), "=r" (error) > + : "r" (tv), "r" (tz), "r" (nr) > + : "$1", "$3", "$8", "$9", "$10", "$11", "$12", "$13", > + "$14", "$15", "$24", "$25", "memory"); > +#else > asm volatile( > " syscall\n" > : "=r" (ret), "=r" (error) > : "r" (tv), "r" (tz), "r" (nr) > : "$1", "$3", "$8", "$9", "$10", "$11", "$12", "$13", > "$14", "$15", "$24", "$25", "hi", "lo", "memory"); > +#endif > > return error ? -ret : ret; > } > @@ -54,12 +63,21 @@ static __always_inline long clock_gettime_fallback( > #endif > register long error asm("a3"); > > +#if __mips_isa_rev >= 6 > + asm volatile( > + " syscall\n" > + : "=r" (ret), "=r" (error) > + : "r" (clkid), "r" (ts), "r" (nr) > + : "$1", "$3", "$8", "$9", "$10", "$11", "$12", "$13", > + "$14", "$15", "$24", "$25", "memory"); > +#else > asm volatile( > " syscall\n" > : "=r" (ret), "=r" (error) > : "r" (clkid), "r" (ts), "r" (nr) > : "$1", "$3", "$8", "$9", "$10", "$11", "$12", "$13", > "$14", "$15", "$24", "$25", "hi", "lo", "memory"); > +#endif > > return error ? -ret : ret; > } > @@ -78,12 +96,21 @@ static __always_inline int clock_getres_fallback( > #endif > register long error asm("a3"); > > +#if __mips_isa_rev >= 6 > + asm volatile( > + " syscall\n" > + : "=r" (ret), "=r" (error) > + : "r" (clkid), "r" (ts), "r" (nr) > + : "$1", "$3", "$8", "$9", "$10", "$11", "$12", "$13", > + "$14", "$15", "$24", "$25", "memory"); > +#else > asm volatile( > " syscall\n" > : "=r" (ret), "=r" (error) > : "r" (clkid), "r" (ts), "r" (nr) > : "$1", "$3", "$8", "$9", "$10", "$11", "$12", "$13", > "$14", "$15", "$24", "$25", "hi", "lo", "memory"); > +#endif > > return error ? -ret : ret; > } > @@ -100,12 +127,21 @@ static __always_inline long clock_gettime32_fallback( > register long nr asm("v0") = __NR_clock_gettime; > register long error asm("a3"); > > +#if __mips_isa_rev >= 6 > + asm volatile( > + " syscall\n" > + : "=r" (ret), "=r" (error) > + : "r" (clkid), "r" (ts), "r" (nr) > + : "$1", "$3", "$8", "$9", "$10", "$11", "$12", "$13", > + "$14", "$15", "$24", "$25", "memory"); > +#else > asm volatile( > " syscall\n" > : "=r" (ret), "=r" (error) > : "r" (clkid), "r" (ts), "r" (nr) > : "$1", "$3", "$8", "$9", "$10", "$11", "$12", "$13", > "$14", "$15", "$24", "$25", "hi", "lo", "memory"); > +#endif > > return error ? -ret : ret; > } > @@ -120,12 +156,21 @@ static __always_inline int clock_getres32_fallback( > register long nr asm("v0") = __NR_clock_getres; > register long error asm("a3"); > > +#if __mips_isa_rev >= 6 > + asm volatile( > + " syscall\n" > + : "=r" (ret), "=r" (error) > + : "r" (clkid), "r" (ts), "r" (nr) > + : "$1", "$3", "$8", "$9", "$10", "$11", "$12", "$13", > + "$14", "$15", "$24", "$25", "memory"); > +#else > asm volatile( > " syscall\n" > : "=r" (ret), "=r" (error) > : "r" (clkid), "r" (ts), "r" (nr) > : "$1", "$3", "$8", "$9", "$10", "$11", "$12", "$13", > "$14", "$15", "$24", "$25", "hi", "lo", "memory"); > +#endif > > return error ? -ret : ret; > } > -- > 2.25.4
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