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Subject[PATCH 4/4] MIPS: Loongson64: Enable PCI_IO_VMMAP
Date
Finally we are able to elegantly add I/O ports for PCI host bridge
via devicetree with logic_pio.

To deal with legacy drivers that have fixed I/O ports range we
reserved 0x10000 in PCI_IOBASE, should be enough for i8259 i8042
stuff.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
---
arch/mips/Kconfig | 1 +
arch/mips/include/asm/io.h | 4 ++++
arch/mips/loongson64/init.c | 12 ++++++++----
arch/mips/loongson64/pci.c | 2 +-
4 files changed, 14 insertions(+), 5 deletions(-)

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 4e5308178649..1669735dacd8 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -479,6 +479,7 @@ config MACH_LOONGSON64
select I8259
select IRQ_MIPS_CPU
select NR_CPUS_DEFAULT_64
+ select PCI_IO_VMMAP
select USE_GENERIC_EARLY_PRINTK_8250
select SYS_HAS_CPU_LOONGSON64
select SYS_HAS_EARLY_PRINTK
diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h
index f15ddcd27f35..7f9716c95aa0 100644
--- a/arch/mips/include/asm/io.h
+++ b/arch/mips/include/asm/io.h
@@ -66,6 +66,10 @@
#define PCI_IOBASE ((void __iomem *)PCI_IO_START)
#define IOPORT_RW_BASE PCI_IO_START

+#ifdef CONFIG_MACH_LOONGSON64
+#define MMIO_LOWER_RESERVED 0x10000
+#endif
+
#else

#define IO_SPACE_LIMIT 0xffff
diff --git a/arch/mips/loongson64/init.c b/arch/mips/loongson64/init.c
index da38944471f4..3117edbbea46 100644
--- a/arch/mips/loongson64/init.c
+++ b/arch/mips/loongson64/init.c
@@ -29,10 +29,6 @@ void __init prom_init(void)
fw_init_cmdline();
prom_init_env();

- /* init base address of io space */
- set_io_port_base((unsigned long)
- ioremap(LOONGSON_PCIIO_BASE, LOONGSON_PCIIO_SIZE));
-
prom_init_numa_memory();

/* Hardcode to CPU UART 0 */
@@ -48,5 +44,13 @@ void __init prom_free_prom_memory(void)

void __init arch_init_irq(void)
{
+ /*
+ * i8259 would access I/O space, so mapping must be done here.
+ * Please remove it when all drivers can be managed by logic_pio.
+ */
+ ioremap_page_range(PCI_IO_START, PCI_IO_START + MMIO_LOWER_RESERVED,
+ LOONGSON_PCIIO_BASE,
+ pgprot_device(PAGE_KERNEL));
+
irqchip_init();
}
diff --git a/arch/mips/loongson64/pci.c b/arch/mips/loongson64/pci.c
index a440a2725a20..7aecb88dd377 100644
--- a/arch/mips/loongson64/pci.c
+++ b/arch/mips/loongson64/pci.c
@@ -37,7 +37,7 @@ extern int sbx00_acpi_init(void);
static int __init pcibios_init(void)
{

- loongson_pci_controller.io_map_base = mips_io_port_base;
+ loongson_pci_controller.io_map_base = IOPORT_RW_BASE;
loongson_pci_mem_resource.start = loongson_sysconf.pci_mem_start_addr;
loongson_pci_mem_resource.end = loongson_sysconf.pci_mem_end_addr;

--
2.26.0.rc2
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