Messages in this thread |  | | Date | Wed, 15 Apr 2020 18:16:57 +0200 | From | Michał Mirosław <> | Subject | Re: [PATCH 4/7] mmc: sdhci: move SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN frequency limit |
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On Wed, Apr 15, 2020 at 04:16:04PM +0300, Adrian Hunter wrote: > On 2/04/20 2:54 pm, Michał Mirosław wrote: > > Move clock frequency limit for SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN where > > it belongs. > > Did you consider getting rid of SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN and > handling it in sdhci-of-arasan instead?
I'm expecting to use this quirk for DDR mode support in other host drivers, but I can't test this, yet.
Best Regards, Michał Mirosław
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