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SubjectR: [PATCH 08/12] devicetree: bindings: pci: add phy-tx0-term-offset to qcom,pcie
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> -----Messaggio originale-----
> Da: Rob Herring <robh@kernel.org>
> Inviato: martedì 31 marzo 2020 19:33
> A: Ansuel Smith <ansuelsmth@gmail.com>
> Cc: Stanimir Varbanov <svarbanov@mm-sol.com>; Andy Gross
> <agross@kernel.org>; Bjorn Andersson <bjorn.andersson@linaro.org>;
> Bjorn Helgaas <bhelgaas@google.com>; Mark Rutland
> <mark.rutland@arm.com>; Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>;
> Andrew Murray <amurray@thegoodpenguin.co.uk>; Philipp Zabel
> <p.zabel@pengutronix.de>; linux-arm-msm@vger.kernel.org; linux-
> pci@vger.kernel.org; devicetree@vger.kernel.org; linux-
> kernel@vger.kernel.org
> Oggetto: Re: [PATCH 08/12] devicetree: bindings: pci: add phy-tx0-term-
> offset to qcom,pcie
>
> On Fri, Mar 20, 2020 at 07:34:50PM +0100, Ansuel Smith wrote:
> > Document phy-tx0-term-offset propriety to qcom pcie driver
>
> propriety?
>
> >
> > Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
> > ---
> > Documentation/devicetree/bindings/pci/qcom,pcie.txt | 7 +++++++
> > 1 file changed, 7 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.txt
> b/Documentation/devicetree/bindings/pci/qcom,pcie.txt
> > index 6efcef040741..8c1d014f37b0 100644
> > --- a/Documentation/devicetree/bindings/pci/qcom,pcie.txt
> > +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.txt
> > @@ -254,6 +254,12 @@
> > - "perst-gpios" PCIe endpoint reset signal line
> > - "wake-gpios" PCIe endpoint wake signal line
> >
> > +- phy-tx0-term-offset:
>
> Needs a vendor prefix.
>

So I should change to qcom,phy-tx0-term-offset right?

> > + Usage: optional
> > + Value type: <u32>
> > + Definition: If not defined is 0. In ipq806x is set to 7. In newer
> > + revision (v2.0) the offset is zero.
> > +
> > * Example for ipq/apq8064
> > pcie@1b500000 {
> > compatible = "qcom,pcie-apq8064", "qcom,pcie-ipq8064",
> "snps,dw-pcie";
> > @@ -293,6 +299,7 @@
> > reset-names = "axi", "ahb", "por", "pci", "phy", "ext";
> > pinctrl-0 = <&pcie_pins_default>;
> > pinctrl-names = "default";
> > + phy-tx0-term-offset = <7>;
> > };
> >
> > * Example for apq8084
> > --
> > 2.25.1
> >

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