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SubjectRe: [PATCH 08/12] devicetree: bindings: pci: add phy-tx0-term-offset to qcom,pcie
On Fri 20 Mar 11:34 PDT 2020, Ansuel Smith wrote:

> Document phy-tx0-term-offset propriety to qcom pcie driver
>
> Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
> ---
> Documentation/devicetree/bindings/pci/qcom,pcie.txt | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.txt b/Documentation/devicetree/bindings/pci/qcom,pcie.txt
> index 6efcef040741..8c1d014f37b0 100644
> --- a/Documentation/devicetree/bindings/pci/qcom,pcie.txt
> +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.txt
> @@ -254,6 +254,12 @@
> - "perst-gpios" PCIe endpoint reset signal line
> - "wake-gpios" PCIe endpoint wake signal line
>
> +- phy-tx0-term-offset:

If I understand your implementation correctly this difference in
hardware revision should be encoded in the compatible string.

Regards,
Bjorn

> + Usage: optional
> + Value type: <u32>
> + Definition: If not defined is 0. In ipq806x is set to 7. In newer
> + revision (v2.0) the offset is zero.
> +
> * Example for ipq/apq8064
> pcie@1b500000 {
> compatible = "qcom,pcie-apq8064", "qcom,pcie-ipq8064", "snps,dw-pcie";
> @@ -293,6 +299,7 @@
> reset-names = "axi", "ahb", "por", "pci", "phy", "ext";
> pinctrl-0 = <&pcie_pins_default>;
> pinctrl-names = "default";
> + phy-tx0-term-offset = <7>;
> };
>
> * Example for apq8084
> --
> 2.25.1
>

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