lkml.org 
[lkml]   [2020]   [Mar]   [31]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
Date
From
SubjectRe: [PATCH v2] ARM: imx: allow to disable board specific PHY fixups
On Tue, Mar 31, 2020 at 10:44:59AM +0200, David Jander wrote:
> On Mon, 30 Mar 2020 18:41:14 +0100
> Russell King - ARM Linux admin <linux@armlinux.org.uk> wrote:
>
> > On Mon, Mar 30, 2020 at 10:33:03AM -0700, Florian Fainelli wrote:
> > >
> > >
> > > On 3/29/2020 10:26 PM, Oleksij Rempel wrote:
> > > > Hi Andrew,
> > > >
> > > > On Sun, Mar 29, 2020 at 05:08:54PM +0200, Andrew Lunn wrote:
> > > >> On Sun, Mar 29, 2020 at 01:04:57PM +0200, Oleksij Rempel wrote:
> > > >>
> > > >> Hi Oleksij
> > > >>
> > > >>> +config DEPRECATED_PHY_FIXUPS
> > > >>> + bool "Enable deprecated PHY fixups"
> > > >>> + default y
> > > >>> + ---help---
> > > >>> + In the early days it was common practice to configure PHYs by adding a
> > > >>> + phy_register_fixup*() in the machine code. This practice turned out to
> > > >>> + be potentially dangerous, because:
> > > >>> + - it affects all PHYs in the system
> > > >>> + - these register changes are usually not preserved during PHY reset
> > > >>> + or suspend/resume cycle.
> > > >>> + - it complicates debugging, since these configuration changes were not
> > > >>> + done by the actual PHY driver.
> > > >>> + This option allows to disable all fixups which are identified as
> > > >>> + potentially harmful and give the developers a chance to implement the
> > > >>> + proper configuration via the device tree (e.g.: phy-mode) and/or the
> > > >>> + related PHY drivers.
> > > >>
> > > >> This appears to be an IMX only problem. Everybody else seems to of got
> > > >> this right. There is no need to bother everybody with this new
> > > >> option. Please put this in arch/arm/mach-mxs/Kconfig and have IMX in
> > > >> the name.
> > > >
> > > > Actually, all fixups seems to do wring thing:
> > > > arch/arm/mach-davinci/board-dm644x-evm.c:915: phy_register_fixup_for_uid(LXT971_PHY_ID, LXT971_PHY_MASK,
> > > >
> > > > Increased MII drive strength. Should be probably enabled by the PHY
> > > > driver.
> > > >
> > > > arch/arm/mach-imx/mach-imx6q.c:167: phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK,
> > > > arch/arm/mach-imx/mach-imx6q.c:169: phy_register_fixup_for_uid(PHY_ID_KSZ9031, MICREL_PHY_ID_MASK,
> > > > arch/arm/mach-imx/mach-imx6q.c:171: phy_register_fixup_for_uid(PHY_ID_AR8031, 0xffffffef,
> > > > arch/arm/mach-imx/mach-imx6q.c:173: phy_register_fixup_for_uid(PHY_ID_AR8035, 0xffffffef,
> >
> > As far as I'm concerned, the AR8035 fixup is there with good reason.
> > It's not just "random" but is required to make the AR8035 usable with
> > the iMX6 SoCs. Not because of a board level thing, but because it's
> > required for the AR8035 to be usable with an iMX6 SoC.
>
> I have checked with the datasheet of the AR8035, and AFAICS, what the code
> does is this:
>
> - Disable the SmartEEE feature of the phy. The comment in the code implies
> that for some reason it doesn't work, but the reason itself is not given.
> Anyway, disabling SmartEEE should IMHO opinion be controlled by a DT
> setting. There is no reason to believe this problem is specific to the
> i.MX6. Besides, it is a feature of the phy, so it seems logical to expose
> that via the DT. Once that is done, it has no place here.
>
> - Set the external clock output to 125MHz. This is needed because the i.MX6
> needs a 125MHz reference clock input. But it is not a requirement to use
> this output. It is perfectly fine and possible to design a board that uses
> an external oscillator for this. It is also possible that an i.MX6 design
> has such a phy connected to a MAC behind a switch or some other interface.
> Independent of i.MX6 this setting can also be necessary for other hardware
> designs, based on different SoC's. In summary, this is a feature of the
> specific hardware design at hand, and has nothing to do with the i.MX6
> specifically. This should definitely be exposed through the DT and not be
> here.
>
> - Enable TXC delay. To clarify, the RGMII specification version 1 specified
> that the RXC and TXC traces should be routed long enough to introduce a
> certain delay to the clock signal, or the delay should be introduced via
> other means. In a later version of the spec, a provision was given for MAC
> or PHY devices to generate this delay internally. The i.MX6 MAC interface
> is unable to generate the required delay internally, so it has to be taken
> care of either by the board layout, or by the PHY device. This is the
> crucial point: The amount of delay set by the PHY delay register depends on
> the board layout. It should NEVER be hard-coded in SoC setup code. The
> correct way is to specify it in the DT. Needless to say that this too,
> isn't i.MX6-specific.
>
> > So, having it registered by the iMX6 SoC code is entirely logical and
> > correct.
>
> I'm afraid I don't agree. See above. This code really should never have been
> here. It is not i.MX6-specific as I pointed out above, nor is it necessarily
> applicable to all i.MX6 boards that use those phy devices.

Then we will have to agree to disagree, sorry.

--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTC broadband for 0.8mile line in suburbia: sync at 10.2Mbps down 587kbps up

\
 
 \ /
  Last update: 2020-03-31 11:38    [W:0.161 / U:28.912 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site