Messages in this thread |  | | Date | Wed, 1 Apr 2020 08:34:08 +0800 | From | kbuild test robot <> | Subject | Re: [PATCH 2/4] clk / soc: mediatek: Bind clock and gpu driver for mt2712 |
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Hi Enric,
I love your patch! Yet something to improve:
[auto build test ERROR on next-20200331] [cannot apply to clk/clk-next robh/for-next rockchip/for-next keystone/next arm64/for-next/core arm-soc/for-next shawnguo/for-next arm/for-next xlnx/master linus/master v5.6 v5.6-rc7 v5.6-rc6 v5.6] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system. BTW, we also suggest to use '--base' option to specify the base tree in git format-patch, please see https://stackoverflow.com/a/37406982]
url: https://github.com/0day-ci/linux/commits/Enric-Balletbo-i-Serra/soc-mediatek-Enable-mmsys-driver-by-default-if-Mediatek-arch-is-selected/20200401-054911 base: 3eb7cccdb3ae41ebb6a2f5f1ccd2821550c61fe1 config: i386-allyesconfig (attached as .config) compiler: gcc-7 (Debian 7.4.0-6) 7.4.0 reproduce: # save the attached .config to linux build tree make ARCH=i386
If you fix the issue, kindly add following tag Reported-by: kbuild test robot <lkp@intel.com>
All errors (new ones prefixed by >>):
>> drivers/clk/mediatek/clk-mt2712-mm.c:154:21: error: 'of_match_clk_mt2712_mm' undeclared here (not in a function) .of_match_table = of_match_clk_mt2712_mm, ^~~~~~~~~~~~~~~~~~~~~~
vim +/of_match_clk_mt2712_mm +154 drivers/clk/mediatek/clk-mt2712-mm.c
e2f744a82d725a weiyi.lu@mediatek.com 2017-10-23 149 e2f744a82d725a weiyi.lu@mediatek.com 2017-10-23 150 static struct platform_driver clk_mt2712_mm_drv = { e2f744a82d725a weiyi.lu@mediatek.com 2017-10-23 151 .probe = clk_mt2712_mm_probe, e2f744a82d725a weiyi.lu@mediatek.com 2017-10-23 152 .driver = { e2f744a82d725a weiyi.lu@mediatek.com 2017-10-23 153 .name = "clk-mt2712-mm", e2f744a82d725a weiyi.lu@mediatek.com 2017-10-23 @154 .of_match_table = of_match_clk_mt2712_mm, e2f744a82d725a weiyi.lu@mediatek.com 2017-10-23 155 }, e2f744a82d725a weiyi.lu@mediatek.com 2017-10-23 156 }; e2f744a82d725a weiyi.lu@mediatek.com 2017-10-23 157
:::::: The code at line 154 was first introduced by commit :::::: e2f744a82d725ab55091cccfb8e527b4220471f0 clk: mediatek: Add MT2712 clock support
:::::: TO: weiyi.lu@mediatek.com <weiyi.lu@mediatek.com> :::::: CC: Stephen Boyd <sboyd@codeaurora.org>
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