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Subject[PATCH v2 11/11] powerpc/32: Replace RFI by rfi
Date
RFI was a macro waving the rfi instruction for the 40x.

Now that 40x is gone, rfi can be used directly.

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
---
arch/powerpc/kernel/entry_32.S | 18 +++++++++---------
arch/powerpc/kernel/head_32.S | 18 +++++++++---------
2 files changed, 18 insertions(+), 18 deletions(-)

diff --git a/arch/powerpc/kernel/entry_32.S b/arch/powerpc/kernel/entry_32.S
index cae0bdc013e5..4920448f6ad9 100644
--- a/arch/powerpc/kernel/entry_32.S
+++ b/arch/powerpc/kernel/entry_32.S
@@ -203,7 +203,7 @@ transfer_to_handler_cont:
mtspr SPRN_SRR1,r10
mtlr r9
SYNC
- RFI /* jump to handler, enable MMU */
+ rfi /* jump to handler, enable MMU */

#ifdef CONFIG_TRACE_IRQFLAGS
1: /* MSR is changing, re-enable MMU so we can notify lockdep. We need to
@@ -216,7 +216,7 @@ transfer_to_handler_cont:
mtspr SPRN_SRR0,r12
mtspr SPRN_SRR1,r0
SYNC
- RFI
+ rfi

reenable_mmu:
/*
@@ -290,7 +290,7 @@ stack_ovf:
mtspr SPRN_SRR0,r9
mtspr SPRN_SRR1,r10
SYNC
- RFI
+ rfi
#endif

#ifdef CONFIG_TRACE_IRQFLAGS
@@ -439,7 +439,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_NEED_PAIRED_STWCX)
mtspr SPRN_SRR0,r7
mtspr SPRN_SRR1,r8
SYNC
- RFI
+ rfi
#ifdef CONFIG_44x
2: li r7,0
iccci r0,r0
@@ -570,7 +570,7 @@ ret_from_kernel_syscall:
mtspr SPRN_SRR0, r9
mtspr SPRN_SRR1, r10
SYNC
- RFI
+ rfi

/*
* The fork/clone functions need to copy the full register set into
@@ -773,7 +773,7 @@ fast_exception_return:
REST_GPR(12, r11)
lwz r11,GPR11(r11)
SYNC
- RFI
+ rfi

#ifndef CONFIG_BOOKE
/* check if the exception happened in a restartable section */
@@ -1008,7 +1008,7 @@ exc_exit_restart:
.globl exc_exit_restart_end
exc_exit_restart_end:
SYNC
- RFI
+ rfi

#else /* !CONFIG_BOOKE */
/*
@@ -1313,7 +1313,7 @@ _GLOBAL(enter_rtas)
stw r7, THREAD + RTAS_SP(r2)
mtspr SPRN_SRR0,r8
mtspr SPRN_SRR1,r9
- RFI
+ rfi
1: tophys_novmstack r9, r1
#ifdef CONFIG_VMAP_STACK
li r0, MSR_KERNEL & ~MSR_IR /* can take DTLB miss */
@@ -1328,7 +1328,7 @@ _GLOBAL(enter_rtas)
stw r0, THREAD + RTAS_SP(r7)
mtspr SPRN_SRR0,r8
mtspr SPRN_SRR1,r9
- RFI /* return to caller */
+ rfi /* return to caller */

.globl machine_check_in_rtas
machine_check_in_rtas:
diff --git a/arch/powerpc/kernel/head_32.S b/arch/powerpc/kernel/head_32.S
index daaa153950c2..13866115a18a 100644
--- a/arch/powerpc/kernel/head_32.S
+++ b/arch/powerpc/kernel/head_32.S
@@ -220,7 +220,7 @@ turn_on_mmu:
ori r0,r0,start_here@l
mtspr SPRN_SRR0,r0
SYNC
- RFI /* enables MMU */
+ rfi /* enables MMU */

/*
* We need __secondary_hold as a place to hold the other cpus on
@@ -784,14 +784,14 @@ fast_hash_page_return:
lwz r11, THR11(r10)
mfspr r10, SPRN_SPRG_SCRATCH0
SYNC
- RFI
+ rfi

1: /* ISI */
mtcr r11
mfspr r11, SPRN_SPRG_SCRATCH1
mfspr r10, SPRN_SPRG_SCRATCH0
SYNC
- RFI
+ rfi

stack_overflow:
vmap_stack_overflow_exception
@@ -930,7 +930,7 @@ __secondary_start:
mtspr SPRN_SRR0,r3
mtspr SPRN_SRR1,r4
SYNC
- RFI
+ rfi
#endif /* CONFIG_SMP */

#ifdef CONFIG_KVM_BOOK3S_HANDLER
@@ -1074,7 +1074,7 @@ END_MMU_FTR_SECTION_IFSET(MMU_FTR_HPTE_TABLE)
mtspr SPRN_SRR0,r4
mtspr SPRN_SRR1,r3
SYNC
- RFI
+ rfi
/* Load up the kernel context */
2: bl load_up_mmu

@@ -1099,7 +1099,7 @@ END_MMU_FTR_SECTION_IFSET(MMU_FTR_HPTE_TABLE)
mtspr SPRN_SRR0,r3
mtspr SPRN_SRR1,r4
SYNC
- RFI
+ rfi

/*
* void switch_mmu_context(struct mm_struct *prev, struct mm_struct *next);
@@ -1217,7 +1217,7 @@ _ENTRY(update_bats)
mtspr SPRN_SRR0, r4
mtspr SPRN_SRR1, r3
SYNC
- RFI
+ rfi
1: bl clear_bats
lis r3, BATS@ha
addi r3, r3, BATS@l
@@ -1237,7 +1237,7 @@ END_MMU_FTR_SECTION_IFSET(MMU_FTR_USE_HIGH_BATS)
mtspr SPRN_SRR0, r7
mtspr SPRN_SRR1, r6
SYNC
- RFI
+ rfi

flush_tlbs:
lis r10, 0x40
@@ -1258,7 +1258,7 @@ mmu_off:
mtspr SPRN_SRR0,r4
mtspr SPRN_SRR1,r3
sync
- RFI
+ rfi

/*
* On 601, we use 3 BATs to map up to 24M of RAM at _PAGE_OFFSET
--
2.25.0
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