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SubjectRe: [tip: irq/core] x86: Select HARDIRQS_SW_RESEND on x86
On Wed, Mar 11, 2020 at 10:42 PM tip-bot2 for Hans de Goede
<tip-bot2@linutronix.de> wrote:

> select GENERIC_GETTIMEOFDAY
> select GENERIC_VDSO_TIME_NS
> select GUP_GET_PTE_LOW_HIGH if X86_PAE
> + select HARDIRQS_SW_RESEND

Just help me understand the semantics of this thing...

According to the text in KConfig:

# Tasklet based software resend for pending interrupts on enable_irq()
config HARDIRQS_SW_RESEND
bool

According to
commit a4633adcdbc15ac51afcd0e1395de58cee27cf92

[PATCH] genirq: add genirq sw IRQ-retrigger

Enable platforms that do not have a hardware-assisted
hardirq-resend mechanism
to resend them via a softirq-driven IRQ emulation mechanism.

so when enable_irq() is called, if the IRQ is already asserted,
it will be distributed in the form of a software irq?

OK I give up I don't understand the semantics of this thing.

Maybe it's because I think of a register where the IRQ line
is just a level IRQ bit thing that stays high as long as the IRQ
is not handled.

So I suppose it is for any type of transient IRQ such as
edge triggered that happened before the system came back
online entirely and now the only remnant of it is a bit in
the irchip status register?

I see that ARM and ARM64 simply just select this. What
happens if you do that and why is x86 not selecting it in general?

Explain it to me and I promise to patch kernel/irq/Kconfig
with the explanation so you don't have to give it again.

Yours,
Linus Walleij

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