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SubjectRe: [v1 1/6] arm64: dts: msm8916: Add i2c-qcom-cci node
On Wed 11 Mar 05:34 PDT 2020, Robert Foss wrote:

> From: Loic Poulain <loic.poulain@linaro.org>
>
> The msm8916 CCI controller provides one CCI/I2C bus.
>
> Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
> Signed-off-by: Robert Foss <robert.foss@linaro.org>
> ---
> arch/arm64/boot/dts/qcom/msm8916.dtsi | 27 +++++++++++++++++++++++++++
> 1 file changed, 27 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
> index 9f31064f2374..afe1d73e5cd3 100644
> --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
> @@ -1503,6 +1503,33 @@
> };
> };
>
> + cci@1b0c000 {

This deserves a label, so that it's possible to reference it and alter
the status in the board dts.

> + compatible = "qcom,msm8916-cci";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x1b0c000 0x1000>;

Please sort nodes my address (and then by name).

Apart from these two nits, this looks good.

Regards,
Bjorn

> + interrupts = <GIC_SPI 50 IRQ_TYPE_EDGE_RISING>;
> + clocks = <&gcc GCC_CAMSS_TOP_AHB_CLK>,
> + <&gcc GCC_CAMSS_CCI_AHB_CLK>,
> + <&gcc GCC_CAMSS_CCI_CLK>,
> + <&gcc GCC_CAMSS_AHB_CLK>;
> + clock-names = "camss_top_ahb", "cci_ahb",
> + "cci", "camss_ahb";
> + assigned-clocks = <&gcc GCC_CAMSS_CCI_AHB_CLK>,
> + <&gcc GCC_CAMSS_CCI_CLK>;
> + assigned-clock-rates = <80000000>, <19200000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&cci0_default>;
> + status = "disabled";
> +
> + cci0: i2c-bus@0 {
> + reg = <0>;
> + clock-frequency = <400000>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> + };
> +
> camss: camss@1b00000 {
> compatible = "qcom,msm8916-camss";
> reg = <0x1b0ac00 0x200>,
> --
> 2.20.1
>

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