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Subject[PATCH v6 0/3] phy: zynqmp: Add PHY driver for the Xilinx ZynqMP Gigabit Transceiver
Date
Hello,

The patch series adds a PHY driver for the Xilinx ZynqMP gigabit serial
transceivers (PS-GTR). The PS-GTR is a set of 4 PHYs that can be used by
the PCIe, USB 3.0, DisplayPort, SATA and Ethernet controllers that are
part of the Serial I/O Unit (SIOU).

The code is based on a previous version sent by Anurag Kumar Vulisha and
available at [1]. The DT bindings have been converted to YAML, and both
the bindings and the driver have been considerably reworked (and
simplified). The most notable changes is the removal of manual handling
of the reset lines of the PHY users (which belongs to the PHY users
themselves), and moving to the standard PHY .power_on() and .configure()
operations to replace functions that were previously exported by the
driver. Please see individual patches for a more detailed changelog.

The code is based on v5.6-rc4 and has been tested with DisplayPort on
the Xilinx ZC106 board.

[1] https://patchwork.kernel.org/cover/10735681/

Anurag Kumar Vulisha (2):
dt-bindings: phy: Add DT bindings for Xilinx ZynqMP PSGTR PHY
phy: zynqmp: Add PHY driver for the Xilinx ZynqMP Gigabit Transceiver

Laurent Pinchart (1):
arm64: dts: zynqmp: Add GTR transceivers

.../bindings/phy/xlnx,zynqmp-psgtr.yaml | 104 ++
MAINTAINERS | 9 +
arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 10 +
drivers/phy/Kconfig | 8 +
drivers/phy/Makefile | 1 +
drivers/phy/phy-zynqmp.c | 995 ++++++++++++++++++
include/dt-bindings/phy/phy.h | 1 +
7 files changed, 1128 insertions(+)
create mode 100644 Documentation/devicetree/bindings/phy/xlnx,zynqmp-psgtr.yaml
create mode 100644 drivers/phy/phy-zynqmp.c

--
Regards,

Laurent Pinchart

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