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Subject[PATCH 3.16 028/148] PCI: Fix Intel ACS quirk UPDCR register address
3.16.82-rc1 review patch.  If anyone has any objections, please let me know.


From: Steffen Liebergeld <>

commit d8558ac8c93d429d65d7490b512a3a67e559d0d4 upstream.

According to documentation [0] the correct offset for the Upstream Peer
Decode Configuration Register (UPDCR) is 0x1014. It was previously defined
as 0x1114.

d99321b63b1f ("PCI: Enable quirks for PCIe ACS on Intel PCH root ports")
intended to enforce isolation between PCI devices allowing them to be put
into separate IOMMU groups. Due to the wrong register offset the intended
isolation was not fully enforced. This is fixed with this patch.

Please note that I did not test this patch because I have no hardware that
implements this register.

[0] (page 325)
Fixes: d99321b63b1f ("PCI: Enable quirks for PCIe ACS on Intel PCH root ports")
Signed-off-by: Steffen Liebergeld <>
Signed-off-by: Bjorn Helgaas <>
Reviewed-by: Andrew Murray <>
Acked-by: Ashok Raj <>
Signed-off-by: Ben Hutchings <>
drivers/pci/quirks.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -3787,7 +3787,7 @@ int pci_dev_specific_acs_enabled(struct
#define INTEL_BSPR_REG_BPPD (1 << 9)

/* Upstream Peer Decode Configuration Register */
-#define INTEL_UPDCR_REG 0x1114
+#define INTEL_UPDCR_REG 0x1014
/* 5:0 Peer Decode Enable bits */

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