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SubjectRe: [PATCH v4 1/8] dt-bindings: phy: qcom,qusb2: Convert QUSB2 phy bindings to yaml
On Wed, Jan 29, 2020 at 07:21:52PM +0530, Sandeep Maheswaram wrote:
> Convert QUSB2 phy bindings to DT schema format using json-schema.
>
> Signed-off-by: Sandeep Maheswaram <sanm@codeaurora.org>
> ---
> .../devicetree/bindings/phy/qcom,qusb2-phy.yaml | 142 +++++++++++++++++++++
> .../devicetree/bindings/phy/qcom-qusb2-phy.txt | 68 ----------
> 2 files changed, 142 insertions(+), 68 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml
> delete mode 100644 Documentation/devicetree/bindings/phy/qcom-qusb2-phy.txt
>
> diff --git a/Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml
> new file mode 100644
> index 0000000..90b3cc6
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml
> @@ -0,0 +1,142 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +
> +%YAML 1.2
> +---
> +$id: "http://devicetree.org/schemas/phy/qcom,qusb2-phy.yaml#"
> +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
> +
> +title: Qualcomm QUSB2 phy controller
> +
> +maintainers:
> + - Manu Gautam <mgautam@codeaurora.org>
> +
> +description:
> + QUSB2 controller supports LS/FS/HS usb connectivity on Qualcomm chipsets.
> +
> +properties:
> + compatible:
> + enum:
> + - qcom,msm8996-qusb2-phy
> + - qcom,msm8998-qusb2-phy
> + - qcom,sdm845-qusb2-phy
> + reg:
> + maxItems: 1
> +
> + "#phy-cells":
> + const: 0
> +
> + clocks:
> + minItems: 2
> + items:
> + - description: phy config clock
> + - description: 19.2 MHz ref clk
> + - description: phy interface clock (Optional)
> +
> + clock-names:
> + minItems: 2
> + items:
> + - const: cfg_ahb
> + - const: ref
> + - const: iface
> +
> + vdda-pll-supply:
> + description:
> + Phandle to 1.8V regulator supply to PHY refclk pll block.
> +
> + vdda-phy-dpdm-supply:
> + description:
> + Phandle to 3.1V regulator supply to Dp/Dm port signals.
> +
> + resets:
> + maxItems: 1
> +
> + nvmem-cells:
> + maxItems: 1
> + description:
> + Phandle to nvmem cell that contains 'HS Tx trim'
> + tuning parameter value for qusb2 phy.
> +
> + qcom,tcsr-syscon:
> + description:
> + Phandle to TCSR syscon register region.
> + $ref: /schemas/types.yaml#/definitions/cell

s/cell/phandle/

With that,

Reviewed-by: Rob Herring <robh@kernel.org>

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