Messages in this thread |  | | From | Andy Lutomirski <> | Date | Wed, 5 Feb 2020 17:18:23 -0800 | Subject | Re: [PATCH] x86/split_lock: Avoid runtime reads of the TEST_CTRL MSR |
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On Wed, Feb 5, 2020 at 4:49 PM Luck, Tony <tony.luck@intel.com> wrote: > > In a context switch from a task that is detecting split locks > to one that is not (or vice versa) we need to update the TEST_CTRL > MSR. Currently this is done with the common sequence: > read the MSR > flip the bit > write the MSR > in order to avoid changing the value of any reserved bits in the MSR. > > Cache the value of the TEST_CTRL MSR when we read it during initialization > so we can avoid an expensive RDMSR instruction during context switch.
If something else that is per-cpu-ish gets added to the MSR in the future, I will personally make fun of you for not making this percpu.
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