Messages in this thread |  | | Subject | Re: [PATCH net-next v2] net: phy: dp83867: Add speed optimization feature | From | Dan Murphy <> | Date | Tue, 4 Feb 2020 14:30:39 -0600 |
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Heiner
On 2/4/20 2:08 PM, Heiner Kallweit wrote: > On 04.02.2020 19:13, Dan Murphy wrote: >> Set the speed optimization bit on the DP83867 PHY. >> This feature can also be strapped on the 64 pin PHY devices >> but the 48 pin devices do not have the strap pin available to enable >> this feature in the hardware. PHY team suggests to have this bit set. >> >> With this bit set the PHY will auto negotiate and report the link >> parameters in the PHYSTS register. This register provides a single >> location within the register set for quick access to commonly accessed >> information. >> >> In this case when auto negotiation is on the PHY core reads the bits >> that have been configured or if auto negotiation is off the PHY core >> reads the BMCR register and sets the phydev parameters accordingly. >> >> This Giga bit PHY can throttle the speed to 100Mbps or 10Mbps to accomodate a >> 4-wire cable. If this should occur the PHYSTS register contains the >> current negotiated speed and duplex mode. >> >> In overriding the genphy_read_status the dp83867_read_status will do a >> genphy_read_status to setup the LP and pause bits. And then the PHYSTS >> register is read and the phydev speed and duplex mode settings are >> updated. >> >> Signed-off-by: Dan Murphy <dmurphy@ti.com> > net-next is closed currently. See here for details: > https://www.kernel.org/doc/Documentation/networking/netdev-FAQ.txt > Reopening will be announced on the netdev mailing list, you can also > check net-next status here: http://vger.kernel.org/~davem/net-next.html > Thanks Heiner for the link I RTM. I will wait for the opening.
Dan
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