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SubjectRe: [PATCH V2 4/7] gpio: zynq: Add Versal support
pt., 14 lut 2020 o 08:16 Srinivas Neeli <srinivas.neeli@xilinx.com> napisał(a):
>
> From: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
>
> Add Versal support in gpio.
> Only bank 0 and 3 are connected to the Multiplexed Input output pins.
> Bank 0 to mio and bank3 to fabric Multiplexed input output pins.
>
> Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
> ---
> Versal devices are the industry's first adaptive compute acceleration platforms.
> https://www.xilinx.com/support/documentation/data_sheets/ds950-versal-overview.pdf
>

Ok so you added the description, but why isn't it part of the commit
message? We want to make this information part of the git history -
otherwise it'll get lost on the mailing list.

Bart

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